203 lines
8.7 KiB
C
203 lines
8.7 KiB
C
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/* ###################################################################
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** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
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** Filename : Cpu.h
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** Project : FS_TC_Test
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** Processor : MK20DN512VLL10
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** Component : MK20DN512LL10
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** Version : Component 01.000, Driver 01.04, CPU db: 3.00.000
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** Datasheet : K20P144M100SF2V2RM Rev. 2, Jun 2012
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** Compiler : GNU C Compiler
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** Date/Time : 2014-12-17, 14:57, # CodeGen: 6
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** Abstract :
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**
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** Settings :
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**
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** Contents :
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** No public methods
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**
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** (c) Freescale Semiconductor, Inc.
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** 2004 All Rights Reserved
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**
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** Copyright : 1997 - 2014 Freescale Semiconductor, Inc.
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** All Rights Reserved.
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** o Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** o Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.freescale.com
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** mail: support@freescale.com
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** ###################################################################*/
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/*!
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** @file Cpu.h
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** @version 01.04
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** @brief
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**
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*/
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/*!
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** @addtogroup Cpu_module Cpu module documentation
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** @{
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*/
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#ifndef __Cpu_H
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#define __Cpu_H
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/* MODULE Cpu. */
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/*Include shared modules, which are used for whole project*/
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#include "USB_CDC/PE_Types.h"
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#include "USB_CDC/PE_Error.h"
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#include "USB_CDC/PE_Const.h"
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#include "hal/derivative.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Active configuration define symbol */
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#define PEcfg_FLASH 1U
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/* Methods configuration constants - generated for all enabled component's methods */
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/* Events configuration constants - generated for all enabled component's events */
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#define Cpu_OnNMIINT_EVENT_ENABLED
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#define CPU_BUS_CLK_HZ 48000000U /* Initial value of the bus clock frequency in Hz */
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#define CPU_CORE_CLK_HZ 96000000U /* Initial value of the core/system clock frequency in Hz. */
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#define CPU_CLOCK_CONFIG_NUMBER 0x01U /* Specifies number of defined clock configurations. */
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#define CPU_BUS_CLK_HZ_CLOCK_CONFIG0 48000000U /* Value of the bus clock frequency in the clock configuration 0 in Hz. */
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#define CPU_CORE_CLK_HZ_CLOCK_CONFIG0 96000000U /* Value of the core/system clock frequency in the clock configuration 0 in Hz. */
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#define CPU_XTAL_CLK_HZ 16000000U /* Value of the external crystal or oscillator clock frequency in Hz */
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#define CPU_INT_SLOW_CLK_HZ 32768U /* Value of the slow internal oscillator clock frequency in Hz */
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#define CPU_INT_FAST_CLK_HZ 4000000U /* Value of the fast internal oscillator clock frequency in Hz */
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#define CPU_FAMILY_Kinetis /* Specification of the core type of the selected cpu */
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#define CPU_DERIVATIVE_MK20DN512LL10 /* Name of the selected cpu derivative */
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#define CPU_PARTNUM_MK20DN512VLL10 /* Part number of the selected cpu */
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#define CPU_LITTLE_ENDIAN /* The selected cpu uses little endian */
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/* CPU frequencies in clock configuration 0 */
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#define CPU_CLOCK_CONFIG_0 0x00U /* Clock configuration 0 identifier */
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#define CPU_CORE_CLK_HZ_CONFIG_0 96000000UL /* Core clock frequency in clock configuration 0 */
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#define CPU_BUS_CLK_HZ_CONFIG_0 48000000UL /* Bus clock frequency in clock configuration 0 */
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#define CPU_FLEXBUS_CLK_HZ_CONFIG_0 48000000UL /* Flexbus clock frequency in clock configuration 0 */
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#define CPU_FLASH_CLK_HZ_CONFIG_0 24000000UL /* FLASH clock frequency in clock configuration 0 */
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#define CPU_USB_CLK_HZ_CONFIG_0 0UL /* USB clock frequency in clock configuration 0 */
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#define CPU_PLL_FLL_CLK_HZ_CONFIG_0 96000000UL /* PLL/FLL clock frequency in clock configuration 0 */
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#define CPU_MCGIR_CLK_HZ_CONFIG_0 32768UL /* MCG internal reference clock frequency in clock configuration 0 */
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#define CPU_OSCER_CLK_HZ_CONFIG_0 16000000UL /* System OSC external reference clock frequency in clock configuration 0 */
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#define CPU_ERCLK32K_CLK_HZ_CONFIG_0 1000UL /* External reference clock 32k frequency in clock configuration 0 */
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#define CPU_MCGFF_CLK_HZ_CONFIG_0 31250UL /* MCG fixed frequency clock */
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typedef struct {
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uint32 cpu_core_clk_hz; /* Core clock frequency in clock configuration */
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uint32 cpu_bus_clk_hz; /* Bus clock frequency in clock configuration */
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uint32 cpu_flexbus_clk_hz; /* Flexbus clock frequency in clock configuration */
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uint32 cpu_flash_clk_hz; /* FLASH clock frequency in clock configuration */
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uint32 cpu_usb_clk_hz; /* USB clock frequency in clock configuration */
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uint32 cpu_pll_fll_clk_hz; /* PLL/FLL clock frequency in clock configuration */
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uint32 cpu_mcgir_clk_hz; /* MCG internal reference clock frequency in clock configuration */
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uint32 cpu_oscer_clk_hz; /* System OSC external reference clock frequency in clock configuration */
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uint32 cpu_erclk32k_clk_hz; /* External reference clock 32k frequency in clock configuration */
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uint32 cpu_mcgff_clk_hz; /* MCG fixed frequency clock */
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} TCpuClockConfiguration;
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/* The array of clock frequencies in configured clock configurations */
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extern const TCpuClockConfiguration PE_CpuClockConfigurations[CPU_CLOCK_CONFIG_NUMBER];
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/* Interrupt vector table type definition */
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typedef void (*const tIsrFunc)(void);
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typedef struct {
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void * __ptr;
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tIsrFunc __fun[0x77];
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} tVectorTable;
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extern const tVectorTable __vect_table;
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/* Global variables */
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/*lint -esym(765,SR_reg) Disable MISRA rule (8.10) checking for symbols (SR_reg). The SR_reg is used in inline assembler. */
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extern volatile uint8 SR_reg; /* Current FAULTMASK register */
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/*lint -esym(765,SR_lock) Disable MISRA rule (8.10) checking for symbols (SR_lock). The SR_reg is used in inline assembler. */
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extern volatile uint8 SR_lock;
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typedef struct
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{
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void (*initClocks)(void);
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void (*initLowLevel)(void);
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} CpuTypeDef;
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extern CpuTypeDef Cpu;
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/* {Default RTOS Adapter} ISR function prototype */
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void __attribute__ ((interrupt)) Cpu_INT_NMIInterrupt(void);
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/*
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** ===================================================================
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** Method : Cpu_INT_NMIInterrupt (component MK20DN512LL10)
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**
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** Description :
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** This ISR services the Non Maskable Interrupt interrupt.
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** This method is internal. It is used by Processor Expert only.
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** ===================================================================
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*/
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void __attribute__ ((interrupt)) Cpu_Interrupt(void);
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/*
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** ===================================================================
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** Method : Cpu_Cpu_Interrupt (component MK20DN512LL10)
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**
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** Description :
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** This ISR services an unused interrupt/exception vector.
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** This method is internal. It is used by Processor Expert only.
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** ===================================================================
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*/
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/* END Cpu. */
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif
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/* __Cpu_H */
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/*!
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** @}
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*/
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/*
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** ###################################################################
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**
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** This file was created by Processor Expert 10.4 [05.11]
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** for the Freescale Kinetis series of microcontrollers.
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**
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** ###################################################################
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*/
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