Initial commit
This commit is contained in:
3727
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/ADC_PDD.h
Normal file
3727
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/ADC_PDD.h
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Load Diff
2898
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CAN_PDD.h
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2898
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CAN_PDD.h
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Load Diff
2501
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CMP_PDD.h
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2501
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CMP_PDD.h
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Load Diff
1110
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CMT_PDD.h
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1110
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CMT_PDD.h
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Load Diff
1134
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CRC_PDD.h
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1134
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/CRC_PDD.h
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Load Diff
1353
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/DAC_PDD.h
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1353
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/DAC_PDD.h
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Load Diff
@@ -0,0 +1,402 @@
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/*
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PDD layer implementation for peripheral type DMAMUX
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(C) 2013 Freescale, Inc. All rights reserved.
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This file is static and it is generated from API-Factory
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*/
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#if !defined(DMAMUX_PDD_H_)
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#define DMAMUX_PDD_H_
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/* ----------------------------------------------------------------------------
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-- Test if supported MCU is active
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---------------------------------------------------------------------------- */
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#if !defined(MCU_ACTIVE)
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// No MCU is active
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#error DMAMUX PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
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#elif \
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!defined(MCU_MK10D10) /* DMAMUX */ && \
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!defined(MCU_MK10D5) /* DMAMUX */ && \
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!defined(MCU_MK10D7) /* DMAMUX */ && \
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!defined(MCU_MK10F12) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK10DZ10) /* DMAMUX */ && \
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!defined(MCU_MK11D5) /* DMAMUX */ && \
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!defined(MCU_MK11D5WS) /* DMAMUX */ && \
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!defined(MCU_MK12D5) /* DMAMUX */ && \
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!defined(MCU_MK20D10) /* DMAMUX */ && \
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!defined(MCU_MK20D5) /* DMAMUX */ && \
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!defined(MCU_MK20D7) /* DMAMUX */ && \
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!defined(MCU_MK20F12) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK20DZ10) /* DMAMUX */ && \
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!defined(MCU_MK21D5) /* DMAMUX */ && \
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!defined(MCU_MK21D5WS) /* DMAMUX */ && \
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!defined(MCU_MK21F12) /* DMAMUX */ && \
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!defined(MCU_MK21F12WS) /* DMAMUX */ && \
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!defined(MCU_MK22D5) /* DMAMUX */ && \
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!defined(MCU_MK22F12810) /* DMAMUX */ && \
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!defined(MCU_MK22F12) /* DMAMUX */ && \
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!defined(MCU_MK22F25612) /* DMAMUX */ && \
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!defined(MCU_MK22F51212) /* DMAMUX */ && \
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!defined(MCU_MK24F12) /* DMAMUX */ && \
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!defined(MCU_MK30D10) /* DMAMUX */ && \
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!defined(MCU_MK30D7) /* DMAMUX */ && \
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!defined(MCU_MK30DZ10) /* DMAMUX */ && \
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!defined(MCU_MK40D10) /* DMAMUX */ && \
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!defined(MCU_MK40D7) /* DMAMUX */ && \
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!defined(MCU_MK40DZ10) /* DMAMUX */ && \
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!defined(MCU_MK40X256VMD100) /* DMAMUX */ && \
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!defined(MCU_MK50D10) /* DMAMUX */ && \
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!defined(MCU_MK50D7) /* DMAMUX */ && \
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!defined(MCU_MK50DZ10) /* DMAMUX */ && \
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!defined(MCU_MK51D10) /* DMAMUX */ && \
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!defined(MCU_MK51D7) /* DMAMUX */ && \
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!defined(MCU_MK51DZ10) /* DMAMUX */ && \
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!defined(MCU_MK52D10) /* DMAMUX */ && \
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!defined(MCU_MK52DZ10) /* DMAMUX */ && \
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!defined(MCU_MK53D10) /* DMAMUX */ && \
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!defined(MCU_MK53DZ10) /* DMAMUX */ && \
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!defined(MCU_MK60D10) /* DMAMUX */ && \
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!defined(MCU_MK60F12) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK60F15) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK60DZ10) /* DMAMUX */ && \
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!defined(MCU_MK60N512VMD100) /* DMAMUX */ && \
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!defined(MCU_MK61F12) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK61F15) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK61F12WS) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK61F15WS) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK63F12) /* DMAMUX */ && \
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!defined(MCU_MK63F12WS) /* DMAMUX */ && \
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!defined(MCU_MK64F12) /* DMAMUX */ && \
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!defined(MCU_MK65F18) /* DMAMUX */ && \
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!defined(MCU_MK65F18WS) /* DMAMUX */ && \
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!defined(MCU_MK66F18) /* DMAMUX */ && \
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!defined(MCU_MK70F12) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK70F15) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK70F12WS) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MK70F15WS) /* DMAMUX0, DMAMUX1 */ && \
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!defined(MCU_MKL04Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL05Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL14Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL15Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL16Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL24Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL25Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL26Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL34Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL36Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKL46Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKV10Z7) /* DMAMUX */ && \
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!defined(MCU_MKV31F12810) /* DMAMUX */ && \
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!defined(MCU_MKV31F25612) /* DMAMUX */ && \
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!defined(MCU_MKV31F51212) /* DMAMUX */ && \
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!defined(MCU_MKW01Z4) /* DMAMUX0 */ && \
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!defined(MCU_MKW21D5) /* DMAMUX */ && \
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!defined(MCU_MKW21D5WS) /* DMAMUX */ && \
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!defined(MCU_MKW22D5) /* DMAMUX */ && \
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!defined(MCU_MKW22D5WS) /* DMAMUX */ && \
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!defined(MCU_MKW24D5) /* DMAMUX */ && \
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!defined(MCU_MKW24D5WS) /* DMAMUX */ && \
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!defined(MCU_PCK20L4) /* DMAMUX */
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// Unsupported MCU is active
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#error DMAMUX PDD library: Unsupported derivative is active.
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#endif
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#include "PDD_Types.h"
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/* ----------------------------------------------------------------------------
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-- Method symbol definitions
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---------------------------------------------------------------------------- */
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/* Channel request source constants. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_0 0U /**< Channel request source 0. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_1 0x1U /**< Channel request source 1. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_2 0x2U /**< Channel request source 2. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_3 0x3U /**< Channel request source 3. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_4 0x4U /**< Channel request source 4. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_5 0x5U /**< Channel request source 5. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_6 0x6U /**< Channel request source 6. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_7 0x7U /**< Channel request source 7. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_8 0x8U /**< Channel request source 8. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_9 0x9U /**< Channel request source 9. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_10 0xAU /**< Channel request source 10. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_11 0xBU /**< Channel request source 11. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_12 0xCU /**< Channel request source 12. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_13 0xDU /**< Channel request source 13. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_14 0xEU /**< Channel request source 14. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_15 0xFU /**< Channel request source 15. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_16 0x10U /**< Channel request source 16. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_17 0x11U /**< Channel request source 17. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_18 0x12U /**< Channel request source 18. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_19 0x13U /**< Channel request source 19. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_20 0x14U /**< Channel request source 20. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_21 0x15U /**< Channel request source 21. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_22 0x16U /**< Channel request source 22. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_23 0x17U /**< Channel request source 23. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_24 0x18U /**< Channel request source 24. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_25 0x19U /**< Channel request source 25. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_26 0x1AU /**< Channel request source 26. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_27 0x1BU /**< Channel request source 27. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_28 0x1CU /**< Channel request source 28. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_29 0x1DU /**< Channel request source 29. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_30 0x1EU /**< Channel request source 30. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_31 0x1FU /**< Channel request source 31. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_32 0x20U /**< Channel request source 32. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_33 0x21U /**< Channel request source 33. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_34 0x22U /**< Channel request source 34. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_35 0x23U /**< Channel request source 35. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_36 0x24U /**< Channel request source 36. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_37 0x25U /**< Channel request source 37. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_38 0x26U /**< Channel request source 38. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_39 0x27U /**< Channel request source 39. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_40 0x28U /**< Channel request source 40. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_41 0x29U /**< Channel request source 41. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_42 0x2AU /**< Channel request source 42. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_43 0x2BU /**< Channel request source 43. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_44 0x2CU /**< Channel request source 44. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_45 0x2DU /**< Channel request source 45. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_46 0x2EU /**< Channel request source 46. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_47 0x2FU /**< Channel request source 47. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_48 0x30U /**< Channel request source 48. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_49 0x31U /**< Channel request source 49. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_50 0x32U /**< Channel request source 50. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_51 0x33U /**< Channel request source 51. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_52 0x34U /**< Channel request source 52. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_53 0x35U /**< Channel request source 53. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_54 0x36U /**< Channel request source 54. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_55 0x37U /**< Channel request source 55. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_56 0x38U /**< Channel request source 56. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_57 0x39U /**< Channel request source 57. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_58 0x3AU /**< Channel request source 58. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_59 0x3BU /**< Channel request source 59. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_60 0x3CU /**< Channel request source 60. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_61 0x3DU /**< Channel request source 61. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_62 0x3EU /**< Channel request source 62. */
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#define DMAMUX_PDD_CHANNEL_SOURCE_63 0x3FU /**< Channel request source 63. */
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/* Channel enabled bit mask */
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#define DMAMUX_PDD_CHANNEL_ENABLED DMAMUX_CHCFG_ENBL_MASK /**< Channel enabled bit mask */
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/* Trigger enabled bit mask */
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#define DMAMUX_PDD_TRIGGER_ENABLED DMAMUX_CHCFG_TRIG_MASK /**< Trigger enabled bit mask */
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/* ----------------------------------------------------------------------------
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-- WriteChannelConfigurationReg
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---------------------------------------------------------------------------- */
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/**
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* @brief Writes to DMA MUX channel configuration register.
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* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
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||||
* base address). You can use the constant defined in the registers
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* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
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* the peripheral initialization component header file
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||||
* (<component_name>_DEVICE).
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* @param Channel DMA channel number. This parameter is of index type.
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* @param Value DMA MUX channel configuration register value. This parameter is
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* a 8-bit value.
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* @return Returns a value of void type.
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* @remarks The macro accesses the following registers: CHCFG[Channel].
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* @par Example:
|
||||
* @code
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* DMAMUX_PDD_WriteChannelConfigurationReg(<peripheral>_BASE_PTR,
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* periphID, 1);
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* @endcode
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*/
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#define DMAMUX_PDD_WriteChannelConfigurationReg(PeripheralBase, Channel, Value) ( \
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DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) = \
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(uint8)(Value) \
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)
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/* ----------------------------------------------------------------------------
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-- ReadChannelConfigurationReg
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---------------------------------------------------------------------------- */
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/**
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* @brief Returns DMA MUX channel configuration register.
|
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* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
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* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
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* @param Channel DMA channel number. This parameter is of index type.
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* @return Returns a 8-bit value.
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* @remarks The macro accesses the following registers: CHCFG[Channel].
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* @par Example:
|
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* @code
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||||
* uint8 result =
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* DMAMUX_PDD_ReadChannelConfigurationReg(<peripheral>_BASE_PTR, periphID);
|
||||
* @endcode
|
||||
*/
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||||
#define DMAMUX_PDD_ReadChannelConfigurationReg(PeripheralBase, Channel) ( \
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DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) \
|
||||
)
|
||||
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||||
/* ----------------------------------------------------------------------------
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||||
-- EnableChannel
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||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
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||||
* @brief Enables or disables DMA MUX channel.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @param State Parameter specifying if DMA MUX channel will be enabled or
|
||||
* disabled. This parameter is of "Global enumeration used for specifying
|
||||
* general enable/disable states (PDD_DISABLE and PDD_ENABLE defined in
|
||||
* PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* DMAMUX_PDD_EnableChannel(<peripheral>_BASE_PTR, periphID, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
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||||
#define DMAMUX_PDD_EnableChannel(PeripheralBase, Channel, State) ( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) = \
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||||
(uint8)(( \
|
||||
(uint8)(( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel))) & ( \
|
||||
(uint8)(~(uint8)DMAMUX_CHCFG_ENBL_MASK)))) | ( \
|
||||
(uint8)((uint8)(State) << DMAMUX_CHCFG_ENBL_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetChannelEnabled
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||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns DMA MUX channel state.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = DMAMUX_PDD_GetChannelEnabled(<peripheral>_BASE_PTR,
|
||||
* periphID);
|
||||
* @endcode
|
||||
*/
|
||||
#define DMAMUX_PDD_GetChannelEnabled(PeripheralBase, Channel) ( \
|
||||
(uint8)(DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) & DMAMUX_CHCFG_ENBL_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableTrigger
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables or disables DMA MUX channel triggering.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @param State Parameter specifying if DMA MUX channel triggering will be
|
||||
* enabled or disabled. This parameter is of "Global enumeration used for
|
||||
* specifying general enable/disable states (PDD_DISABLE and PDD_ENABLE defined
|
||||
* in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* DMAMUX_PDD_EnableTrigger(<peripheral>_BASE_PTR, periphID, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define DMAMUX_PDD_EnableTrigger(PeripheralBase, Channel, State) ( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) = \
|
||||
(uint8)(( \
|
||||
(uint8)(( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel))) & ( \
|
||||
(uint8)(~(uint8)DMAMUX_CHCFG_TRIG_MASK)))) | ( \
|
||||
(uint8)((uint8)(State) << DMAMUX_CHCFG_TRIG_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetTriggerEnabled
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns DMA MUX channel triggering state.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = DMAMUX_PDD_GetTriggerEnabled(<peripheral>_BASE_PTR,
|
||||
* periphID);
|
||||
* @endcode
|
||||
*/
|
||||
#define DMAMUX_PDD_GetTriggerEnabled(PeripheralBase, Channel) ( \
|
||||
(uint8)(DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) & DMAMUX_CHCFG_TRIG_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetChannelSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets DMA channels source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @param ChannelSource DMA channel source number. This parameter is a 6-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* DMAMUX_PDD_SetChannelSource(<peripheral>_BASE_PTR, periphID, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define DMAMUX_PDD_SetChannelSource(PeripheralBase, Channel, ChannelSource) ( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) = \
|
||||
(uint8)(( \
|
||||
(uint8)(( \
|
||||
DMAMUX_CHCFG_REG(PeripheralBase,(Channel))) & ( \
|
||||
(uint8)(~(uint8)DMAMUX_CHCFG_SOURCE_MASK)))) | ( \
|
||||
(uint8)(ChannelSource))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetChannelSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns mask of enabled DMA channels requests.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Channel DMA channel number. This parameter is of index type.
|
||||
* @return Returns a 6-bit value. The value is cast to "uint8".
|
||||
* @remarks The macro accesses the following registers: CHCFG[Channel].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = DMAMUX_PDD_GetChannelSource(<peripheral>_BASE_PTR,
|
||||
* periphID);
|
||||
* @endcode
|
||||
*/
|
||||
#define DMAMUX_PDD_GetChannelSource(PeripheralBase, Channel) ( \
|
||||
(uint8)(DMAMUX_CHCFG_REG(PeripheralBase,(Channel)) & DMAMUX_CHCFG_SOURCE_MASK) \
|
||||
)
|
||||
#endif /* #if defined(DMAMUX_PDD_H_) */
|
||||
|
||||
/* DMAMUX_PDD.h, eof. */
|
||||
7966
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/DMA_PDD.h
Normal file
7966
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/DMA_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,490 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type EWM
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(EWM_PDD_H_)
|
||||
#define EWM_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error EWM PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* EWM */ && \
|
||||
!defined(MCU_MK10D5) /* EWM */ && \
|
||||
!defined(MCU_MK10D7) /* EWM */ && \
|
||||
!defined(MCU_MK10F12) /* EWM */ && \
|
||||
!defined(MCU_MK10DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK11D5) /* EWM */ && \
|
||||
!defined(MCU_MK11D5WS) /* EWM */ && \
|
||||
!defined(MCU_MK12D5) /* EWM */ && \
|
||||
!defined(MCU_MK20D10) /* EWM */ && \
|
||||
!defined(MCU_MK20D5) /* EWM */ && \
|
||||
!defined(MCU_MK20D7) /* EWM */ && \
|
||||
!defined(MCU_MK20F12) /* EWM */ && \
|
||||
!defined(MCU_MK20DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK21D5) /* EWM */ && \
|
||||
!defined(MCU_MK21D5WS) /* EWM */ && \
|
||||
!defined(MCU_MK21F12) /* EWM */ && \
|
||||
!defined(MCU_MK21F12WS) /* EWM */ && \
|
||||
!defined(MCU_MK22D5) /* EWM */ && \
|
||||
!defined(MCU_MK22F12810) /* EWM */ && \
|
||||
!defined(MCU_MK22F12) /* EWM */ && \
|
||||
!defined(MCU_MK22F25612) /* EWM */ && \
|
||||
!defined(MCU_MK22F51212) /* EWM */ && \
|
||||
!defined(MCU_MK24F12) /* EWM */ && \
|
||||
!defined(MCU_MK30D10) /* EWM */ && \
|
||||
!defined(MCU_MK30D7) /* EWM */ && \
|
||||
!defined(MCU_MK30DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK40D10) /* EWM */ && \
|
||||
!defined(MCU_MK40D7) /* EWM */ && \
|
||||
!defined(MCU_MK40DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* EWM */ && \
|
||||
!defined(MCU_MK50D10) /* EWM */ && \
|
||||
!defined(MCU_MK50D7) /* EWM */ && \
|
||||
!defined(MCU_MK50DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK51D10) /* EWM */ && \
|
||||
!defined(MCU_MK51D7) /* EWM */ && \
|
||||
!defined(MCU_MK51DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK52D10) /* EWM */ && \
|
||||
!defined(MCU_MK52DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK53D10) /* EWM */ && \
|
||||
!defined(MCU_MK53DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK60D10) /* EWM */ && \
|
||||
!defined(MCU_MK60F12) /* EWM */ && \
|
||||
!defined(MCU_MK60F15) /* EWM */ && \
|
||||
!defined(MCU_MK60DZ10) /* EWM */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* EWM */ && \
|
||||
!defined(MCU_MK61F12) /* EWM */ && \
|
||||
!defined(MCU_MK61F15) /* EWM */ && \
|
||||
!defined(MCU_MK61F12WS) /* EWM */ && \
|
||||
!defined(MCU_MK61F15WS) /* EWM */ && \
|
||||
!defined(MCU_MK63F12) /* EWM */ && \
|
||||
!defined(MCU_MK63F12WS) /* EWM */ && \
|
||||
!defined(MCU_MK64F12) /* EWM */ && \
|
||||
!defined(MCU_MK65F18) /* EWM */ && \
|
||||
!defined(MCU_MK65F18WS) /* EWM */ && \
|
||||
!defined(MCU_MK66F18) /* EWM */ && \
|
||||
!defined(MCU_MK70F12) /* EWM */ && \
|
||||
!defined(MCU_MK70F15) /* EWM */ && \
|
||||
!defined(MCU_MK70F12WS) /* EWM */ && \
|
||||
!defined(MCU_MK70F15WS) /* EWM */ && \
|
||||
!defined(MCU_MKV10Z7) /* EWM */ && \
|
||||
!defined(MCU_MKV31F12810) /* EWM */ && \
|
||||
!defined(MCU_MKV31F25612) /* EWM */ && \
|
||||
!defined(MCU_MKV31F51212) /* EWM */ && \
|
||||
!defined(MCU_MKW21D5) /* EWM */ && \
|
||||
!defined(MCU_MKW21D5WS) /* EWM */ && \
|
||||
!defined(MCU_MKW22D5) /* EWM */ && \
|
||||
!defined(MCU_MKW22D5WS) /* EWM */ && \
|
||||
!defined(MCU_MKW24D5) /* EWM */ && \
|
||||
!defined(MCU_MKW24D5WS) /* EWM */ && \
|
||||
!defined(MCU_PCK20L4) /* EWM */
|
||||
// Unsupported MCU is active
|
||||
#error EWM PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Service constants */
|
||||
#define EWM_PDD_KEY_1 0xB4U /**< First key */
|
||||
#define EWM_PDD_KEY_2 0x2CU /**< Second key */
|
||||
|
||||
/* Clock source constants. */
|
||||
#define EWM_PDD_SOURCE_ROSC_8M 0U /**< Relaxation oscillator clock */
|
||||
#define EWM_PDD_SOURCE_XTAL_OSC 0x1U /**< Crystal oscillator clock */
|
||||
#define EWM_PDD_SOURCE_BUS_CLK 0x2U /**< IP bus clock */
|
||||
#define EWM_PDD_SOURCE_ROSC_200K 0x3U /**< Low speed oscillator clock */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the control register. This parameter is a 8-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteControlReg(PeripheralBase, Value) ( \
|
||||
EWM_CTRL_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetEnableDeviceStatus
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns current state of EWM device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_GetEnableDeviceStatus(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_GetEnableDeviceStatus(PeripheralBase) ( \
|
||||
(uint8)(EWM_CTRL_REG(PeripheralBase) & EWM_CTRL_EWMEN_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteCompareLowReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the compare low register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the compare low register. This parameter is a
|
||||
* 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CMPL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteCompareLowReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteCompareLowReg(PeripheralBase, Value) ( \
|
||||
EWM_CMPL_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCompareLowReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the compare low register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CMPL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_ReadCompareLowReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_ReadCompareLowReg(PeripheralBase) ( \
|
||||
EWM_CMPL_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteCompareHighReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the compare high register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the compare high register. This parameter is a
|
||||
* 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CMPH.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteCompareHighReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteCompareHighReg(PeripheralBase, Value) ( \
|
||||
EWM_CMPH_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCompareHighReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the compare high register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CMPH.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_ReadCompareHighReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_ReadCompareHighReg(PeripheralBase) ( \
|
||||
EWM_CMPH_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteServiceReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the service register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Service constant. This parameter is a 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_SERV.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteServiceReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteServiceReg(PeripheralBase, Value) ( \
|
||||
EWM_SERV_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disables the EWM interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_DisableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_DisableInterrupt(PeripheralBase) ( \
|
||||
EWM_CTRL_REG(PeripheralBase) &= \
|
||||
(uint8)(~(uint8)EWM_CTRL_INTEN_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the EWM interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_EnableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_EnableInterrupt(PeripheralBase) ( \
|
||||
EWM_CTRL_REG(PeripheralBase) |= \
|
||||
EWM_CTRL_INTEN_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SelectClockSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Selects clock source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Source New value of the source. This parameter is of "Clock source
|
||||
* constants." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKCTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_SelectClockSource(<peripheral>_BASE_PTR,
|
||||
* EWM_PDD_SOURCE_ROSC_8M);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_SelectClockSource(PeripheralBase, Source) ( \
|
||||
EWM_CLKCTRL_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(EWM_CLKCTRL_REG(PeripheralBase) & (uint8)(~(uint8)EWM_CLKCTRL_CLKSEL_MASK))) | ( \
|
||||
(uint8)(Source))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPrescaler
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets prescale value.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New value of the prescaler. This parameter is a 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKPRESCALER.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_SetPrescaler(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_SetPrescaler(PeripheralBase, Value) ( \
|
||||
EWM_CLKPRESCALER_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_ReadControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_ReadControlReg(PeripheralBase) ( \
|
||||
EWM_CTRL_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteClockControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the clock control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the clock control register. This parameter is a
|
||||
* 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKCTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteClockControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteClockControlReg(PeripheralBase, Value) ( \
|
||||
EWM_CLKCTRL_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadClockControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the clock control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKCTRL.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_ReadClockControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_ReadClockControlReg(PeripheralBase) ( \
|
||||
EWM_CLKCTRL_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteClockPrescalerReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the clock prescaler register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the clock prescaler register. This parameter is a
|
||||
* 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKPRESCALER.
|
||||
* @par Example:
|
||||
* @code
|
||||
* EWM_PDD_WriteClockPrescalerReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_WriteClockPrescalerReg(PeripheralBase, Value) ( \
|
||||
EWM_CLKPRESCALER_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadClockPrescalerReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the clock prescaler register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: EWM_CLKPRESCALER.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = EWM_PDD_ReadClockPrescalerReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define EWM_PDD_ReadClockPrescalerReg(PeripheralBase) ( \
|
||||
EWM_CLKPRESCALER_REG(PeripheralBase) \
|
||||
)
|
||||
#endif /* #if defined(EWM_PDD_H_) */
|
||||
|
||||
/* EWM_PDD.h, eof. */
|
||||
1244
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FMC_PDD.h
Normal file
1244
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FMC_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
3215
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FTFL_PDD.h
Normal file
3215
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FTFL_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
5072
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FTM_PDD.h
Normal file
5072
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/FTM_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,516 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type GPIO
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(GPIO_PDD_H_)
|
||||
#define GPIO_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error GPIO PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK10D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK10D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK10F12) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK10DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK11D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK11D5WS) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK12D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK20D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK20D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK20D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK20F12) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK20DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK21D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK21D5WS) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK21F12) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK21F12WS) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK22D5) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK22F12810) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK22F12) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK22F25612) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK22F51212) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK24F12) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK30D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK30D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK30DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK40D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK40D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK40DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK50D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK50D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK50DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK51D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK51D7) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK51DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK52D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK52DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK53D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK53DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK60D10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK60F12) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK60F15) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK60DZ10) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK61F12) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK61F15) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK61F12WS) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK61F15WS) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK63F12) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK63F12WS) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK64F12) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK65F18) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK65F18WS) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK66F18) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MK70F12) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK70F15) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK70F12WS) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MK70F15WS) /* PTA, PTB, PTC, PTD, PTE, PTF */ && \
|
||||
!defined(MCU_MKE02Z2) /* GPIOA, GPIOB */ && \
|
||||
!defined(MCU_MKE02Z4) /* GPIOA, GPIOB */ && \
|
||||
!defined(MCU_SKEAZN642) /* GPIOA, GPIOB */ && \
|
||||
!defined(MCU_MKE04Z1284) /* GPIOA, GPIOB, GPIOC */ && \
|
||||
!defined(MCU_MKE04Z4) /* GPIOA */ && \
|
||||
!defined(MCU_SKEAZN84) /* GPIOA */ && \
|
||||
!defined(MCU_MKE06Z4) /* GPIOA, GPIOB, GPIOC */ && \
|
||||
!defined(MCU_MKL02Z4) /* PTA, PTB */ && \
|
||||
!defined(MCU_MKL03Z4) /* PTA, PTB */ && \
|
||||
!defined(MCU_MKL04Z4) /* PTA, PTB */ && \
|
||||
!defined(MCU_MKL05Z4) /* PTA, PTB */ && \
|
||||
!defined(MCU_MKL14Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL15Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL16Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL24Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL25Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL26Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL34Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL36Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKL46Z4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKV10Z7) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKV31F12810) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKV31F25612) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKV31F51212) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_MKW01Z4) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW21D5) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW21D5WS) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW22D5) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW22D5WS) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW24D5) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_MKW24D5WS) /* GPIOA, GPIOB, GPIOC, GPIOD, GPIOE */ && \
|
||||
!defined(MCU_PCK20L4) /* PTA, PTB, PTC, PTD, PTE */ && \
|
||||
!defined(MCU_SKEAZ1284) /* GPIOA, GPIOB, GPIOC */
|
||||
// Unsupported MCU is active
|
||||
#error GPIO PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
//#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Pin masks */
|
||||
#define GPIO_PDD_PIN_0 0x1U /**< Pin 0 mask */
|
||||
#define GPIO_PDD_PIN_1 0x2U /**< Pin 1 mask */
|
||||
#define GPIO_PDD_PIN_2 0x4U /**< Pin 2 mask */
|
||||
#define GPIO_PDD_PIN_3 0x8U /**< Pin 3 mask */
|
||||
#define GPIO_PDD_PIN_4 0x10U /**< Pin 4 mask */
|
||||
#define GPIO_PDD_PIN_5 0x20U /**< Pin 5 mask */
|
||||
#define GPIO_PDD_PIN_6 0x40U /**< Pin 6 mask */
|
||||
#define GPIO_PDD_PIN_7 0x80U /**< Pin 7 mask */
|
||||
#define GPIO_PDD_PIN_8 0x100U /**< Pin 8 mask */
|
||||
#define GPIO_PDD_PIN_9 0x200U /**< Pin 9 mask */
|
||||
#define GPIO_PDD_PIN_10 0x400U /**< Pin 10 mask */
|
||||
#define GPIO_PDD_PIN_11 0x800U /**< Pin 11 mask */
|
||||
#define GPIO_PDD_PIN_12 0x1000U /**< Pin 12 mask */
|
||||
#define GPIO_PDD_PIN_13 0x2000U /**< Pin 13 mask */
|
||||
#define GPIO_PDD_PIN_14 0x4000U /**< Pin 14 mask */
|
||||
#define GPIO_PDD_PIN_15 0x8000U /**< Pin 15 mask */
|
||||
#define GPIO_PDD_PIN_16 0x10000U /**< Pin 16 mask */
|
||||
#define GPIO_PDD_PIN_17 0x20000U /**< Pin 17 mask */
|
||||
#define GPIO_PDD_PIN_18 0x40000U /**< Pin 18 mask */
|
||||
#define GPIO_PDD_PIN_19 0x80000U /**< Pin 19 mask */
|
||||
#define GPIO_PDD_PIN_20 0x100000U /**< Pin 20 mask */
|
||||
#define GPIO_PDD_PIN_21 0x200000U /**< Pin 21 mask */
|
||||
#define GPIO_PDD_PIN_22 0x400000U /**< Pin 22 mask */
|
||||
#define GPIO_PDD_PIN_23 0x800000U /**< Pin 23 mask */
|
||||
#define GPIO_PDD_PIN_24 0x1000000U /**< Pin 24 mask */
|
||||
#define GPIO_PDD_PIN_25 0x2000000U /**< Pin 25 mask */
|
||||
#define GPIO_PDD_PIN_26 0x4000000U /**< Pin 26 mask */
|
||||
#define GPIO_PDD_PIN_27 0x8000000U /**< Pin 27 mask */
|
||||
#define GPIO_PDD_PIN_28 0x10000000U /**< Pin 28 mask */
|
||||
#define GPIO_PDD_PIN_29 0x20000000U /**< Pin 29 mask */
|
||||
#define GPIO_PDD_PIN_30 0x40000000U /**< Pin 30 mask */
|
||||
#define GPIO_PDD_PIN_31 0x80000000U /**< Pin 31 mask */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetPortDataInput
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Gets port data input independently of current direction setting nor
|
||||
* pin usage. It returns zeros for pins which are not configured for a digital
|
||||
* function.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDIR, GPIOB_PDIR,
|
||||
* GPIOC_PDIR, GPIOD_PDIR, GPIOE_PDIR, GPIOF_PDIR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = GPIO_PDD_GetPortDataInput(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_GetPortDataInput(PeripheralBase) ( \
|
||||
(uint32)GPIO_PDIR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortDataOutput
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets port data output. The value is driven out to the corresponding
|
||||
* pin if direction of the pin is set to output.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Parameter specifying new data output value. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDOR, GPIOB_PDOR,
|
||||
* GPIOC_PDOR, GPIOD_PDOR, GPIOE_PDOR, GPIOF_PDOR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortDataOutput(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortDataOutput(PeripheralBase, Value) ( \
|
||||
GPIO_PDOR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetPortDataOutput
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Gets port data output independently of current direction setting.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDOR, GPIOB_PDOR,
|
||||
* GPIOC_PDOR, GPIOD_PDOR, GPIOE_PDOR, GPIOF_PDOR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = GPIO_PDD_GetPortDataOutput(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_GetPortDataOutput(PeripheralBase) ( \
|
||||
(uint32)GPIO_PDOR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearPortDataOutputMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clears required bits of port data output.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be cleared. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PCOR, GPIOB_PCOR,
|
||||
* GPIOC_PCOR, GPIOD_PCOR, GPIOE_PCOR, GPIOF_PCOR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_ClearPortDataOutputMask(<peripheral>_BASE_PTR, GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_ClearPortDataOutputMask(PeripheralBase, Mask) ( \
|
||||
GPIO_PCOR_REG(PeripheralBase) = \
|
||||
(uint32)(Mask) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortDataOutputMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets required bits of port data output.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be set. Use constants
|
||||
* from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PSOR, GPIOB_PSOR,
|
||||
* GPIOC_PSOR, GPIOD_PSOR, GPIOE_PSOR, GPIOF_PSOR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortDataOutputMask(<peripheral>_BASE_PTR, GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortDataOutputMask(PeripheralBase, Mask) ( \
|
||||
GPIO_PSOR_REG(PeripheralBase) = \
|
||||
(uint32)(Mask) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- TogglePortDataOutputMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Toggles required bits of port data output.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be inverted. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PTOR, GPIOB_PTOR,
|
||||
* GPIOC_PTOR, GPIOD_PTOR, GPIOE_PTOR, GPIOF_PTOR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_TogglePortDataOutputMask(<peripheral>_BASE_PTR,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_TogglePortDataOutputMask(PeripheralBase, Mask) ( \
|
||||
GPIO_PTOR_REG(PeripheralBase) = \
|
||||
(uint32)(Mask) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortInputDirectionMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if ((defined(MCU_MKE02Z2)) || (defined(MCU_MKE02Z4)) || (defined(MCU_MKE04Z1284)) || (defined(MCU_MKE04Z4)) || (defined(MCU_MKE06Z4)) || (defined(MCU_SKEAZ1284)) || (defined(MCU_SKEAZN642)) || (defined(MCU_SKEAZN84)))
|
||||
/**
|
||||
* @brief Sets required pins as input.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be set as input. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR, GPIOA_PIDR,
|
||||
* GPIOB_PIDR, GPIOC_PIDR (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortInputDirectionMask(<peripheral>_BASE_PTR,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortInputDirectionMask(PeripheralBase, Mask) ( \
|
||||
(GPIO_PDDR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)(Mask))), \
|
||||
(GPIO_PIDR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)(Mask))) \
|
||||
)
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
/**
|
||||
* @brief Sets required pins as input.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be set as input. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR, GPIOA_PIDR,
|
||||
* GPIOB_PIDR, GPIOC_PIDR (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortInputDirectionMask(<peripheral>_BASE_PTR,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortInputDirectionMask(PeripheralBase, Mask) ( \
|
||||
GPIO_PDDR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)(Mask)) \
|
||||
)
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortOutputDirectionMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets required pins as output.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mask Parameter specifying port pins which should be set as output. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortOutputDirectionMask(<peripheral>_BASE_PTR,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortOutputDirectionMask(PeripheralBase, Mask) ( \
|
||||
GPIO_PDDR_REG(PeripheralBase) |= \
|
||||
(uint32)(Mask) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortDirectionMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if ((defined(MCU_MKE02Z2)) || (defined(MCU_MKE02Z4)) || (defined(MCU_MKE04Z1284)) || (defined(MCU_MKE04Z4)) || (defined(MCU_MKE06Z4)) || (defined(MCU_SKEAZ1284)) || (defined(MCU_SKEAZN642)) || (defined(MCU_SKEAZN84)))
|
||||
/**
|
||||
* @brief Sets direction on pins specified by mask parameters.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param InputMask Mask of port pins defining which should be set as input. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @param OutputMask Mask of port pins defining which should be set as output.
|
||||
* Use constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR, GPIOA_PIDR,
|
||||
* GPIOB_PIDR, GPIOC_PIDR (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortDirectionMask(<peripheral>_BASE_PTR, GPIO_PDD_PIN_0,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortDirectionMask(PeripheralBase, InputMask, OutputMask) ( \
|
||||
(GPIO_PDDR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(GPIO_PDDR_REG(PeripheralBase) & (uint32)(~(uint32)(InputMask)))) | ( \
|
||||
(uint32)(OutputMask)))), \
|
||||
(GPIO_PIDR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)(InputMask))) \
|
||||
)
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
/**
|
||||
* @brief Sets direction on pins specified by mask parameters.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param InputMask Mask of port pins defining which should be set as input. Use
|
||||
* constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @param OutputMask Mask of port pins defining which should be set as output.
|
||||
* Use constants from group "Pin masks". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR, GPIOA_PIDR,
|
||||
* GPIOB_PIDR, GPIOC_PIDR (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortDirectionMask(<peripheral>_BASE_PTR, GPIO_PDD_PIN_0,
|
||||
* GPIO_PDD_PIN_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortDirectionMask(PeripheralBase, InputMask, OutputMask) ( \
|
||||
GPIO_PDDR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(GPIO_PDDR_REG(PeripheralBase) & (uint32)(~(uint32)(InputMask)))) | ( \
|
||||
(uint32)(OutputMask))) \
|
||||
)
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPortDirection
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets direction of every pin in the port.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Parameter specifying new direction for port pins. This parameter
|
||||
* is a 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* GPIO_PDD_SetPortDirection(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_SetPortDirection(PeripheralBase, Value) ( \
|
||||
GPIO_PDDR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetPortDirection
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Gets direction of every pin in the port.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: GPIOA_PDDR, GPIOB_PDDR,
|
||||
* GPIOC_PDDR, GPIOD_PDDR, GPIOE_PDDR, GPIOF_PDDR (depending on the
|
||||
* peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = GPIO_PDD_GetPortDirection(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define GPIO_PDD_GetPortDirection(PeripheralBase) ( \
|
||||
(uint32)GPIO_PDDR_REG(PeripheralBase) \
|
||||
)
|
||||
#endif /* #if defined(GPIO_PDD_H_) */
|
||||
|
||||
/* GPIO_PDD.h, eof. */
|
||||
2150
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/I2C_PDD.h
Normal file
2150
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/I2C_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,788 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type LPTMR
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(LPTMR_PDD_H_)
|
||||
#define LPTMR_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error LPTMR PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK10D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK10D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK10F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK10DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK11D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK11D5WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK12D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK20D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK20D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK20D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK20F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK20DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK21D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK21D5WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK21F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK21F12WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK22D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK22F12810) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK22F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK22F25612) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK22F51212) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK24F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK30D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK30D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK30DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK40D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK40D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK40DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK50D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK50D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK50DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK51D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK51D7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK51DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK52D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK52DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK53D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK53DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK60D10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK60F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK60F15) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK60DZ10) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK61F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK61F15) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK61F12WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK61F15WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK63F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK63F12WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK64F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK65F18) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK65F18WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK66F18) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK70F12) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK70F15) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK70F12WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MK70F15WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL02Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL03Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL04Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL05Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL14Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL15Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL16Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL24Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL25Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL26Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL34Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL36Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKL46Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKV10Z7) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKV31F12810) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKV31F25612) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKV31F51212) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW01Z4) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW21D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW21D5WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW22D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW22D5WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW24D5) /* LPTMR0 */ && \
|
||||
!defined(MCU_MKW24D5WS) /* LPTMR0 */ && \
|
||||
!defined(MCU_PCK20L4) /* LPTMR0 */
|
||||
// Unsupported MCU is active
|
||||
#error LPTMR PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Enable freerun constants */
|
||||
#define LPTMR_PDD_RESTART_ENABLED 0U /**< Enabled */
|
||||
#define LPTMR_PDD_RESTART_DISABLED LPTMR_CSR_TFC_MASK /**< Disabled */
|
||||
|
||||
/* Timer mode constants */
|
||||
#define LPTMR_PDD_SOURCE_INTERNAL 0U /**< Internal */
|
||||
#define LPTMR_PDD_SOURCE_EXTERNAL LPTMR_CSR_TMS_MASK /**< External */
|
||||
|
||||
/* Prescaler/Filter constants */
|
||||
#define LPTMR_PDD_PRESCALER_2 0U /**< 2 */
|
||||
#define LPTMR_PDD_PRESCALER_4 0x1U /**< 4 */
|
||||
#define LPTMR_PDD_PRESCALER_8 0x2U /**< 8 */
|
||||
#define LPTMR_PDD_PRESCALER_16 0x3U /**< 16 */
|
||||
#define LPTMR_PDD_PRESCALER_32 0x4U /**< 32 */
|
||||
#define LPTMR_PDD_PRESCALER_64 0x5U /**< 64 */
|
||||
#define LPTMR_PDD_PRESCALER_128 0x6U /**< 128 */
|
||||
#define LPTMR_PDD_PRESCALER_256 0x7U /**< 256 */
|
||||
#define LPTMR_PDD_PRESCALER_512 0x8U /**< 512 */
|
||||
#define LPTMR_PDD_PRESCALER_1024 0x9U /**< 1024 */
|
||||
#define LPTMR_PDD_PRESCALER_2048 0xAU /**< 2048 */
|
||||
#define LPTMR_PDD_PRESCALER_4096 0xBU /**< 4096 */
|
||||
#define LPTMR_PDD_PRESCALER_8192 0xCU /**< 8192 */
|
||||
#define LPTMR_PDD_PRESCALER_16384 0xDU /**< 16384 */
|
||||
#define LPTMR_PDD_PRESCALER_32768 0xEU /**< 32768 */
|
||||
#define LPTMR_PDD_PRESCALER_65536 0xFU /**< 65536 */
|
||||
#define LPTMR_PDD_FILTER_2 0x1U /**< 2 */
|
||||
#define LPTMR_PDD_FILTER_4 0x2U /**< 4 */
|
||||
#define LPTMR_PDD_FILTER_8 0x3U /**< 8 */
|
||||
#define LPTMR_PDD_FILTER_16 0x4U /**< 16 */
|
||||
#define LPTMR_PDD_FILTER_32 0x5U /**< 32 */
|
||||
#define LPTMR_PDD_FILTER_64 0x6U /**< 64 */
|
||||
#define LPTMR_PDD_FILTER_128 0x7U /**< 128 */
|
||||
#define LPTMR_PDD_FILTER_256 0x8U /**< 256 */
|
||||
#define LPTMR_PDD_FILTER_512 0x9U /**< 512 */
|
||||
#define LPTMR_PDD_FILTER_1024 0xAU /**< 1024 */
|
||||
#define LPTMR_PDD_FILTER_2048 0xBU /**< 2048 */
|
||||
#define LPTMR_PDD_FILTER_4096 0xCU /**< 4096 */
|
||||
#define LPTMR_PDD_FILTER_8192 0xDU /**< 8192 */
|
||||
#define LPTMR_PDD_FILTER_16384 0xEU /**< 16384 */
|
||||
#define LPTMR_PDD_FILTER_32768 0xFU /**< 32768 */
|
||||
|
||||
/* Divider constants */
|
||||
#define LPTMR_PDD_DIVIDER_1 0x1U /**< 1 */
|
||||
#define LPTMR_PDD_DIVIDER_2 0U /**< 2 */
|
||||
#define LPTMR_PDD_DIVIDER_4 0x2U /**< 4 */
|
||||
#define LPTMR_PDD_DIVIDER_8 0x4U /**< 8 */
|
||||
#define LPTMR_PDD_DIVIDER_16 0x6U /**< 16 */
|
||||
#define LPTMR_PDD_DIVIDER_32 0x8U /**< 32 */
|
||||
#define LPTMR_PDD_DIVIDER_64 0xAU /**< 64 */
|
||||
#define LPTMR_PDD_DIVIDER_128 0xCU /**< 128 */
|
||||
#define LPTMR_PDD_DIVIDER_256 0xEU /**< 256 */
|
||||
#define LPTMR_PDD_DIVIDER_512 0x10U /**< 512 */
|
||||
#define LPTMR_PDD_DIVIDER_1024 0x12U /**< 1024 */
|
||||
#define LPTMR_PDD_DIVIDER_2048 0x14U /**< 2048 */
|
||||
#define LPTMR_PDD_DIVIDER_4096 0x16U /**< 4096 */
|
||||
#define LPTMR_PDD_DIVIDER_8192 0x18U /**< 8192 */
|
||||
#define LPTMR_PDD_DIVIDER_16384 0x1AU /**< 16384 */
|
||||
#define LPTMR_PDD_DIVIDER_32768 0x1CU /**< 32768 */
|
||||
#define LPTMR_PDD_DIVIDER_65536 0x1EU /**< 65536 */
|
||||
|
||||
/* Timer Pin Select constants. */
|
||||
#define LPTMR_PDD_HSCMP 0U /**< Alt 0 */
|
||||
#define LPTMR_PDD_PIN_1 0x10U /**< Alt 1 */
|
||||
#define LPTMR_PDD_PIN_2 0x20U /**< Alt 2 */
|
||||
#define LPTMR_PDD_PIN_3 0x30U /**< Alt 3 */
|
||||
|
||||
/* Timer Pin Polarity constants. */
|
||||
#define LPTMR_PDD_POLARITY_RISING 0U /**< Rising */
|
||||
#define LPTMR_PDD_POLARITY_FALLING 0x8U /**< Falling */
|
||||
|
||||
/* Prescaler bypass constants. */
|
||||
#define LPTMR_PDD_BYPASS_DISABLED 0U /**< Disabled */
|
||||
#define LPTMR_PDD_BYPASS_ENABLED 0x4U /**< Enabled */
|
||||
|
||||
/* Clock source constants. */
|
||||
#define LPTMR_PDD_SOURCE_INTREF 0U /**< Internal reference clock */
|
||||
#define LPTMR_PDD_SOURCE_LPO1KHZ 0x1U /**< Low power oscillator clock */
|
||||
#define LPTMR_PDD_SOURCE_EXT32KHZ 0x2U /**< External 32 kHz clock */
|
||||
#define LPTMR_PDD_SOURCE_EXTREF 0x3U /**< External reference clock */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt mask.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_GetInterruptMask(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_GetInterruptMask(PeripheralBase) ( \
|
||||
(uint32)(LPTMR_CSR_REG(PeripheralBase) & LPTMR_CSR_TIE_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt flag bit.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_GetInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_GetInterruptFlag(PeripheralBase) ( \
|
||||
(uint32)(LPTMR_CSR_REG(PeripheralBase) & LPTMR_CSR_TCF_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the LPT interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_EnableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_EnableInterrupt(PeripheralBase) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(LPTMR_CSR_REG(PeripheralBase) | LPTMR_CSR_TIE_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disables the LPT interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_DisableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_DisableInterrupt(PeripheralBase) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) &= \
|
||||
(uint32)(( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TIE_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clears LPT interrupt flag.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_ClearInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ClearInterruptFlag(PeripheralBase) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) |= \
|
||||
LPTMR_CSR_TCF_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SelectPin
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets Timer Pin Select bits.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param TPS_val New value of the TPS. This parameter is of "Timer Pin Select
|
||||
* constants." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SelectPin(<peripheral>_BASE_PTR, LPTMR_PDD_HSCMP);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SelectPin(PeripheralBase, TPS_val) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_CSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TPS_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))))) | ( \
|
||||
(uint32)(TPS_val))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPinPolarity
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Configures the polarity of the input source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Edge New value of the polarity. This parameter is of "Timer Pin
|
||||
* Polarity constants." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SetPinPolarity(<peripheral>_BASE_PTR,
|
||||
* LPTMR_PDD_POLARITY_RISING);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SetPinPolarity(PeripheralBase, Edge) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_CSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TPP_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))))) | ( \
|
||||
(uint32)(Edge))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFreerun
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Configures the freerun mode.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Restart New value of the restart. Use constants from group "Enable
|
||||
* freerun constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_EnableFreerun(<peripheral>_BASE_PTR,
|
||||
* LPTMR_PDD_RESTART_ENABLED);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_EnableFreerun(PeripheralBase, Restart) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_CSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TFC_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))))) | ( \
|
||||
(uint32)(Restart))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTimerMode
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Selects timer mode.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Source New value of the source. Use constants from group "Timer mode
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SetTimerMode(<peripheral>_BASE_PTR,
|
||||
* LPTMR_PDD_SOURCE_INTERNAL);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SetTimerMode(PeripheralBase, Source) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_CSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TMS_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))))) | ( \
|
||||
(uint32)(Source))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableDevice
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the LPT device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Requested state of LPT device. This parameter is of "Global
|
||||
* enumeration used for specifying general enable/disable states (PDD_DISABLE
|
||||
* and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_EnableDevice(<peripheral>_BASE_PTR, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_EnableDevice(PeripheralBase, State) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_CSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TEN_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_CSR_TCF_MASK))))) | ( \
|
||||
(uint32)(State))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetEnableDeviceStatus
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns current state of LPT device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* LPTMR_PDD_GetEnableDeviceStatus(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_GetEnableDeviceStatus(PeripheralBase) ( \
|
||||
(uint32)(LPTMR_CSR_REG(PeripheralBase) & LPTMR_CSR_TEN_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetPrescaler
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets prescale value.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Prescaler New value of the prescaler. Use constants from group
|
||||
* "Prescaler/Filter constants". This parameter is 4 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SetPrescaler(<peripheral>_BASE_PTR, LPTMR_PDD_PRESCALER_2);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SetPrescaler(PeripheralBase, Prescaler) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(LPTMR_PSR_REG(PeripheralBase) & (uint32)(~(uint32)LPTMR_PSR_PRESCALE_MASK))) | ( \
|
||||
(uint32)((uint32)(Prescaler) << LPTMR_PSR_PRESCALE_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnablePrescalerBypass
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets prescaler bypass.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Bypass New value of the bypass. This parameter is of "Prescaler bypass
|
||||
* constants." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_EnablePrescalerBypass(<peripheral>_BASE_PTR,
|
||||
* LPTMR_PDD_BYPASS_DISABLED);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_EnablePrescalerBypass(PeripheralBase, Bypass) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(LPTMR_PSR_REG(PeripheralBase) & (uint32)(~(uint32)LPTMR_PSR_PBYP_MASK))) | ( \
|
||||
(uint32)(Bypass))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetDivider
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets both prescale value and bypass value.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Divider New value of the divider. Use constants from group "Divider
|
||||
* constants". This parameter is 5 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SetDivider(<peripheral>_BASE_PTR, LPTMR_PDD_DIVIDER_1);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SetDivider(PeripheralBase, Divider) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
LPTMR_PSR_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)LPTMR_PSR_PRESCALE_MASK)) & ( \
|
||||
(uint32)(~(uint32)LPTMR_PSR_PBYP_MASK))))) | (( \
|
||||
(uint32)((uint32)((uint32)(Divider) >> 1U) << LPTMR_PSR_PRESCALE_SHIFT)) | ( \
|
||||
(uint32)((uint32)((uint32)(Divider) & 0x1U) << LPTMR_PSR_PBYP_SHIFT)))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SelectPrescalerSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Selects clock source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Source New value of the source. This parameter is of "Clock source
|
||||
* constants." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_SelectPrescalerSource(<peripheral>_BASE_PTR,
|
||||
* LPTMR_PDD_SOURCE_INTREF);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_SelectPrescalerSource(PeripheralBase, Source) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(LPTMR_PSR_REG(PeripheralBase) & (uint32)(~(uint32)LPTMR_PSR_PCS_MASK))) | ( \
|
||||
(uint32)(Source))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteCompareReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the compare register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the compare register. This parameter is a 32-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CMR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_WriteCompareReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_WriteCompareReg(PeripheralBase, Value) ( \
|
||||
LPTMR_CMR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCompareReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the compare register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CMR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_ReadCompareReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ReadCompareReg(PeripheralBase) ( \
|
||||
LPTMR_CMR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCounterReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if ((defined(MCU_MK10DZ10)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60N512VMD100)))
|
||||
/**
|
||||
* @brief Returns the content of the counter register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CNR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_ReadCounterReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ReadCounterReg(PeripheralBase) ( \
|
||||
LPTMR_CNR_REG(PeripheralBase) \
|
||||
)
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK52D10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
/**
|
||||
* @brief Returns the content of the counter register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CNR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_ReadCounterReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ReadCounterReg(PeripheralBase) ( \
|
||||
(LPTMR_CNR_REG(PeripheralBase) = \
|
||||
0U), \
|
||||
LPTMR_CNR_REG(PeripheralBase) \
|
||||
)
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK52D10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteControlStatusReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the control status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the control status register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_WriteControlStatusReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_WriteControlStatusReg(PeripheralBase, Value) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadControlStatusReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the control status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_ReadControlStatusReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ReadControlStatusReg(PeripheralBase) ( \
|
||||
LPTMR_CSR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WritePrescaleReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the prescale register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the prescale register. This parameter is a 32-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* LPTMR_PDD_WritePrescaleReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_WritePrescaleReg(PeripheralBase, Value) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadPrescaleReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the prescale register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LPTMR0_PSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = LPTMR_PDD_ReadPrescaleReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define LPTMR_PDD_ReadPrescaleReg(PeripheralBase) ( \
|
||||
LPTMR_PSR_REG(PeripheralBase) \
|
||||
)
|
||||
#endif /* #if defined(LPTMR_PDD_H_) */
|
||||
|
||||
/* LPTMR_PDD.h, eof. */
|
||||
@@ -0,0 +1,787 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type MCM
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(MCM_PDD_H_)
|
||||
#define MCM_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error MCM PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* MCM */ && \
|
||||
!defined(MCU_MK10D7) /* MCM */ && \
|
||||
!defined(MCU_MK10F12) /* MCM */ && \
|
||||
!defined(MCU_MK10DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK11D5) /* MCM */ && \
|
||||
!defined(MCU_MK11D5WS) /* MCM */ && \
|
||||
!defined(MCU_MK12D5) /* MCM */ && \
|
||||
!defined(MCU_MK20D10) /* MCM */ && \
|
||||
!defined(MCU_MK20D7) /* MCM */ && \
|
||||
!defined(MCU_MK20F12) /* MCM */ && \
|
||||
!defined(MCU_MK20DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK21D5) /* MCM */ && \
|
||||
!defined(MCU_MK21D5WS) /* MCM */ && \
|
||||
!defined(MCU_MK21F12) /* MCM */ && \
|
||||
!defined(MCU_MK21F12WS) /* MCM */ && \
|
||||
!defined(MCU_MK22D5) /* MCM */ && \
|
||||
!defined(MCU_MK22F12810) /* MCM */ && \
|
||||
!defined(MCU_MK22F12) /* MCM */ && \
|
||||
!defined(MCU_MK22F25612) /* MCM */ && \
|
||||
!defined(MCU_MK22F51212) /* MCM */ && \
|
||||
!defined(MCU_MK24F12) /* MCM */ && \
|
||||
!defined(MCU_MK30D10) /* MCM */ && \
|
||||
!defined(MCU_MK30D7) /* MCM */ && \
|
||||
!defined(MCU_MK30DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK40D10) /* MCM */ && \
|
||||
!defined(MCU_MK40D7) /* MCM */ && \
|
||||
!defined(MCU_MK40DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* MCM */ && \
|
||||
!defined(MCU_MK50D10) /* MCM */ && \
|
||||
!defined(MCU_MK50D7) /* MCM */ && \
|
||||
!defined(MCU_MK50DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK51D10) /* MCM */ && \
|
||||
!defined(MCU_MK51D7) /* MCM */ && \
|
||||
!defined(MCU_MK51DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK52D10) /* MCM */ && \
|
||||
!defined(MCU_MK52DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK53D10) /* MCM */ && \
|
||||
!defined(MCU_MK53DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK60D10) /* MCM */ && \
|
||||
!defined(MCU_MK60F12) /* MCM */ && \
|
||||
!defined(MCU_MK60F15) /* MCM */ && \
|
||||
!defined(MCU_MK60DZ10) /* MCM */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* MCM */ && \
|
||||
!defined(MCU_MK61F12) /* MCM */ && \
|
||||
!defined(MCU_MK61F15) /* MCM */ && \
|
||||
!defined(MCU_MK61F12WS) /* MCM */ && \
|
||||
!defined(MCU_MK61F15WS) /* MCM */ && \
|
||||
!defined(MCU_MK63F12) /* MCM */ && \
|
||||
!defined(MCU_MK63F12WS) /* MCM */ && \
|
||||
!defined(MCU_MK64F12) /* MCM */ && \
|
||||
!defined(MCU_MK65F18) /* MCM */ && \
|
||||
!defined(MCU_MK65F18WS) /* MCM */ && \
|
||||
!defined(MCU_MK66F18) /* MCM */ && \
|
||||
!defined(MCU_MK70F12) /* MCM */ && \
|
||||
!defined(MCU_MK70F15) /* MCM */ && \
|
||||
!defined(MCU_MK70F12WS) /* MCM */ && \
|
||||
!defined(MCU_MK70F15WS) /* MCM */ && \
|
||||
!defined(MCU_MKE02Z2) /* MCM */ && \
|
||||
!defined(MCU_MKE02Z4) /* MCM */ && \
|
||||
!defined(MCU_SKEAZN642) /* MCM */ && \
|
||||
!defined(MCU_MKE04Z1284) /* MCM */ && \
|
||||
!defined(MCU_MKE04Z4) /* MCM */ && \
|
||||
!defined(MCU_SKEAZN84) /* MCM */ && \
|
||||
!defined(MCU_MKE06Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL02Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL03Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL04Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL05Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL14Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL15Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL16Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL24Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL25Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL26Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL34Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL36Z4) /* MCM */ && \
|
||||
!defined(MCU_MKL46Z4) /* MCM */ && \
|
||||
!defined(MCU_MKV10Z7) /* MCM */ && \
|
||||
!defined(MCU_MKV31F12810) /* MCM */ && \
|
||||
!defined(MCU_MKV31F25612) /* MCM */ && \
|
||||
!defined(MCU_MKV31F51212) /* MCM */ && \
|
||||
!defined(MCU_MKW01Z4) /* MCM */ && \
|
||||
!defined(MCU_MKW21D5) /* MCM */ && \
|
||||
!defined(MCU_MKW21D5WS) /* MCM */ && \
|
||||
!defined(MCU_MKW22D5) /* MCM */ && \
|
||||
!defined(MCU_MKW22D5WS) /* MCM */ && \
|
||||
!defined(MCU_MKW24D5) /* MCM */ && \
|
||||
!defined(MCU_MKW24D5WS) /* MCM */ && \
|
||||
!defined(MCU_SKEAZ1284) /* MCM */
|
||||
// Unsupported MCU is active
|
||||
#error MCM PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Slave bus connection to AXBS input port masks constants (for
|
||||
GetSlaveBusConnectionToAxbsInputPort macro). */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_0 0x1U /**< A bus slave connection to AXBS input port 0 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_1 0x2U /**< A bus slave connection to AXBS input port 1 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_2 0x4U /**< A bus slave connection to AXBS input port 2 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_3 0x8U /**< A bus slave connection to AXBS input port 3 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_4 0x10U /**< A bus slave connection to AXBS input port 4 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_5 0x20U /**< A bus slave connection to AXBS input port 5 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_6 0x40U /**< A bus slave connection to AXBS input port 6 is present */
|
||||
#define MCM_PDD_SLAVE_BUS_CONNECTION_TO_AXBS_INPUT_PORT_7 0x80U /**< A bus slave connection to AXBS input port 7 is present */
|
||||
|
||||
/* Master bus connection to AXBS input port masks constants (for
|
||||
GetMasterBusConnectionToAxbsInputPortMask macro). */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_0 0x1U /**< A bus master connection to AXBS input port 0 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_1 0x2U /**< A bus master connection to AXBS input port 1 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_2 0x4U /**< A bus master connection to AXBS input port 2 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_3 0x8U /**< A bus master connection to AXBS input port 3 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_4 0x10U /**< A bus master connection to AXBS input port 4 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_5 0x20U /**< A bus master connection to AXBS input port 5 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_6 0x40U /**< A bus master connection to AXBS input port 6 is present */
|
||||
#define MCM_PDD_MASTER_BUS_CONNECTION_TO_AXBS_INPUT_PORT_7 0x80U /**< A bus master connection to AXBS input port 7 is present */
|
||||
|
||||
#if ((defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW01Z4)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)))
|
||||
/* Crossbar master arbitration type */
|
||||
#define MCM_PDD_FIXED_PRIORITY 0U /**< Fixed-priority arbitration for the crossbar masters */
|
||||
#define MCM_PDD_ROUND_ROBIN 0x200U /**< Round-robin arbitration for the crossbar masters */
|
||||
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) */
|
||||
/* Crossbar master arbitration type */
|
||||
#define MCM_PDD_FIXED_PRIORITY 0U /**< Fixed-priority arbitration for the crossbar masters */
|
||||
#define MCM_PDD_ROUND_ROBIN 0x1U /**< Round-robin arbitration for the crossbar masters */
|
||||
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetSlaveBusConnectionToAxbsInputPortMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns present mask value of a corresponding connection to the
|
||||
* crossbar switch's slave input port.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_PLASC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result =
|
||||
* MCM_PDD_GetSlaveBusConnectionToAxbsInputPortMask(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_GetSlaveBusConnectionToAxbsInputPortMask(PeripheralBase) ( \
|
||||
(uint8)(MCM_PLASC_REG(PeripheralBase) & MCM_PLASC_ASC_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCrossbarSwitchSlaveConfigurationReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads crossbar switch (AXBS) slave configuration register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 16-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_PLASC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint16 result =
|
||||
* MCM_PDD_ReadCrossbarSwitchSlaveConfigurationReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_ReadCrossbarSwitchSlaveConfigurationReg(PeripheralBase) ( \
|
||||
MCM_PLASC_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetMasterBusConnectionToAxbsInputPortMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns present mask value of a corresponding connection to the
|
||||
* crossbar switch's master input port.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_PLAMC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result =
|
||||
* MCM_PDD_GetMasterBusConnectionToAxbsInputPortMask(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_GetMasterBusConnectionToAxbsInputPortMask(PeripheralBase) ( \
|
||||
(uint8)(MCM_PLAMC_REG(PeripheralBase) & MCM_PLAMC_AMC_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCrossbarSwitchMasterConfigurationReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads crossbar switch (AXBS) master configuration register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 16-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_PLAMC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint16 result =
|
||||
* MCM_PDD_ReadCrossbarSwitchMasterConfigurationReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_ReadCrossbarSwitchMasterConfigurationReg(PeripheralBase) ( \
|
||||
MCM_PLAMC_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetCrossbarMastersArbitrationType
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Selects arbitration type for crossbar masters.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Crossbar masters arbitration type. This parameter is of
|
||||
* "Crossbar master arbitration type" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_SetCrossbarMastersArbitrationType(<peripheral>_BASE_PTR,
|
||||
* MCM_PDD_FIXED_PRIORITY);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_SetCrossbarMastersArbitrationType(PeripheralBase, State) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(MCM_PLACR_REG(PeripheralBase) & (uint32)(~(uint32)MCM_PLACR_ARB_MASK))) | ( \
|
||||
(uint32)(State))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadPlatformControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads platform control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = MCM_PDD_ReadPlatformControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_ReadPlatformControlReg(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WritePlatformControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into platform control
|
||||
* register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the platform control register. This
|
||||
* parameter is a 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_WritePlatformControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_WritePlatformControlReg(PeripheralBase, Value) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableStallingFlashController
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable stalling flash controller.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableStallingFlashController(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableStallingFlashController(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_ESFC_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableStallingFlashController
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable stalling flash controller.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableStallingFlashController(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableStallingFlashController(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_ESFC_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableFlashControllerSpeculation
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable flash controller speculation.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableFlashControllerSpeculation(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableFlashControllerSpeculation(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_DFCS_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFlashControllerSpeculation
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable flash controller speculation.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableFlashControllerSpeculation(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableFlashControllerSpeculation(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_DFCS_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableFlashDataSpeculation
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable flash data speculation.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableFlashDataSpeculation(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableFlashDataSpeculation(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_EFDS_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFlashDataSpeculation
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable flash data speculation.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableFlashDataSpeculation(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableFlashDataSpeculation(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_EFDS_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFlashControllerCache
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable flash controllerCache.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableFlashControllerCache(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableFlashControllerCache(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_DFCC_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableFlashControllerCache
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable flash controllerCache.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableFlashControllerCache(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableFlashControllerCache(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_DFCC_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFlashControllerInstructionCaching
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable flash controller instruction caching.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableFlashControllerInstructionCaching(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableFlashControllerInstructionCaching(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_DFCIC_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableFlashControllerInstructionCaching
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable flash controller instruction caching.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableFlashControllerInstructionCaching(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableFlashControllerInstructionCaching(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_DFCIC_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableFlashControllerDataCaching
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable flash controller data caching.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableFlashControllerDataCaching(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableFlashControllerDataCaching(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_PLACR_DFCDA_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableFlashControllerDataCaching
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable flash controller data caching.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_DisableFlashControllerDataCaching(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_DisableFlashControllerDataCaching(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_DFCDA_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- InvalidateFlashCache
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Invalidates flash cache.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_PLACR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_InvalidateFlashCache(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_InvalidateFlashCache(PeripheralBase) ( \
|
||||
MCM_PLACR_REG(PeripheralBase) |= \
|
||||
MCM_PLACR_CFCC_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableComputeOperationWakeupOnInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enable compute operation wakeup on interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_EnableComputeOperationWakeupOnInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_EnableComputeOperationWakeupOnInterrupt(PeripheralBase) ( \
|
||||
MCM_CPO_REG(PeripheralBase) |= \
|
||||
MCM_CPO_CPOWOI_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetComputeOperationState
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns non zero value if compute operation entry has completed or
|
||||
* compute operation exit has not completed.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* MCM_PDD_GetComputeOperationState(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_GetComputeOperationState(PeripheralBase) ( \
|
||||
(uint32)(MCM_CPO_REG(PeripheralBase) & MCM_CPO_CPOACK_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetComputeOperationRequest
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns non zero value if compute operation request is active.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* MCM_PDD_GetComputeOperationRequest(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_GetComputeOperationRequest(PeripheralBase) ( \
|
||||
(uint32)(MCM_CPO_REG(PeripheralBase) & MCM_CPO_CPOREQ_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetComputeOperationRequest
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Set compute operation request.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_SetComputeOperationRequest(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_SetComputeOperationRequest(PeripheralBase) ( \
|
||||
MCM_CPO_REG(PeripheralBase) |= \
|
||||
MCM_CPO_CPOREQ_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearComputeOperationRequest
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clear compute operation request.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_ClearComputeOperationRequest(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_ClearComputeOperationRequest(PeripheralBase) ( \
|
||||
MCM_CPO_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)MCM_CPO_CPOREQ_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadComputeOperationControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads compute operation control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* MCM_PDD_ReadComputeOperationControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_ReadComputeOperationControlReg(PeripheralBase) ( \
|
||||
MCM_CPO_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteComputeOperationControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into compute operation
|
||||
* control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the compute operation control register.
|
||||
* This parameter is a 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: MCM_CPO.
|
||||
* @par Example:
|
||||
* @code
|
||||
* MCM_PDD_WriteComputeOperationControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define MCM_PDD_WriteComputeOperationControlReg(PeripheralBase, Value) ( \
|
||||
MCM_CPO_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
#endif /* #if defined(MCM_PDD_H_) */
|
||||
|
||||
/* MCM_PDD.h, eof. */
|
||||
1716
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/PDB_PDD.h
Normal file
1716
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/PDB_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,69 @@
|
||||
/* Common type declarations for PDD layer */
|
||||
/* This file is static and it is generated from API-Factory */
|
||||
|
||||
#ifndef PDD_TYPES_H_
|
||||
#define PDD_TYPES_H_
|
||||
|
||||
/* --------------------------------------------------------------- */
|
||||
/* --------- PDD_TBool */
|
||||
/* --------------------------------------------------------------- */
|
||||
|
||||
/* Implementation note for boolean type: */
|
||||
/* Native "bool" type should be used for boolean values */
|
||||
/* because the compiler provides optimization and best type representation. */
|
||||
/* If the compiler does not support native "bool" type, common "Bool" */
|
||||
/* at each place there should be used the most suitable integer type */
|
||||
/* and no explicit conversion to 0 and 1 values should be used. */
|
||||
/* Common "TBool" typedef could have possible performance issue */
|
||||
/* (there is a problem how wide type to select). It is good to avoid using */
|
||||
/* explicit "!= 0" because of performance penalty, but without such */
|
||||
/* explicit conversion to 0/1 the resulting type may be too wide. */
|
||||
/* Every bool type (native or replaced by integer value) should be always */
|
||||
/* treated as zero-equal or non-zero (see below for examples). */
|
||||
|
||||
/* E.g.: This compiler supports boolean type only in C++ mode. */
|
||||
/* Out of the C++ mode the boolean type must be simulated. */
|
||||
|
||||
#ifndef __cplusplus
|
||||
typedef uint16 PDD_TBool;
|
||||
#else
|
||||
typedef bool PDD_TBool;
|
||||
#endif
|
||||
|
||||
/* ============================================================================
|
||||
================== General PDD macros ======================================
|
||||
============================================================================ */
|
||||
|
||||
#define PDD_DISABLE 0u
|
||||
#define PDD_ENABLE 1u
|
||||
|
||||
/* ============================================================================
|
||||
================== General register manipulating routines ==================
|
||||
============================================================================ */
|
||||
|
||||
#define setReg8(Reg, val) ((Reg) = (uint8)(val))
|
||||
#define getReg8(Reg) (Reg)
|
||||
#define testReg8Bits(Reg, GetMask) ((Reg) & (uint8)(GetMask))
|
||||
#define clrReg8Bits(Reg, ClrMask) ((Reg) &= (uint8)((uint8)(~(uint8)(ClrMask))))
|
||||
#define setReg8Bits(Reg, SetMask) ((Reg) |= (uint8)(SetMask))
|
||||
#define invertReg8Bits(Reg, InvMask) ((Reg) ^= (uint8)(InvMask))
|
||||
#define clrSetReg8Bits(Reg, ClrMask, SetMask) ((Reg) = (uint8)(((Reg) & (uint8)(~(uint8)(ClrMask))) | (uint8)(SetMask)))
|
||||
|
||||
#define setReg16(Reg, val) ((Reg) = (uint16)(val))
|
||||
#define getReg16(Reg) (Reg)
|
||||
#define testReg16Bits(Reg, GetMask) ((Reg) & (uint16)(GetMask))
|
||||
#define clrReg16Bits(Reg, ClrMask) ((Reg) &= (uint16)(~(uint16)(ClrMask)))
|
||||
#define setReg16Bits(Reg, SetMask) ((Reg) |= (uint16)(SetMask))
|
||||
#define invertReg16Bits(Reg, InvMask) ((Reg) ^= (uint16)(InvMask))
|
||||
#define clrSetReg16Bits(Reg, ClrMask, SetMask) ((Reg) = (uint16)(((Reg) & (uint16)(~(uint16)(ClrMask))) | (uint16)(SetMask)))
|
||||
|
||||
#define setReg32(Reg, val) ((Reg) = (uint32)(val))
|
||||
#define getReg32(Reg) (Reg)
|
||||
#define testReg32Bits(Reg, GetMask) ((Reg) & (uint32)(GetMask))
|
||||
#define clrReg32Bits(Reg, ClrMask) ((Reg) &= (uint32)(~(uint32)(ClrMask)))
|
||||
#define setReg32Bits(Reg, SetMask) ((Reg) |= (uint32)(SetMask))
|
||||
#define invertReg32Bits(Reg, InvMask) ((Reg) ^= (uint32)(InvMask))
|
||||
#define clrSetReg32Bits(Reg, ClrMask, SetMask) ((Reg) = (uint32)(((Reg) & (uint32)(~(uint32)(ClrMask))) | (uint32)(SetMask)))
|
||||
|
||||
|
||||
#endif /* #if !defined(PDD_TYPES_H_) */
|
||||
@@ -0,0 +1,602 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type PIT
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(PIT_PDD_H_)
|
||||
#define PIT_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error PIT PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* PIT */ && \
|
||||
!defined(MCU_MK10D5) /* PIT */ && \
|
||||
!defined(MCU_MK10D7) /* PIT */ && \
|
||||
!defined(MCU_MK10F12) /* PIT */ && \
|
||||
!defined(MCU_MK10DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK11D5) /* PIT */ && \
|
||||
!defined(MCU_MK11D5WS) /* PIT */ && \
|
||||
!defined(MCU_MK12D5) /* PIT */ && \
|
||||
!defined(MCU_MK20D10) /* PIT */ && \
|
||||
!defined(MCU_MK20D5) /* PIT */ && \
|
||||
!defined(MCU_MK20D7) /* PIT */ && \
|
||||
!defined(MCU_MK20F12) /* PIT */ && \
|
||||
!defined(MCU_MK20DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK21D5) /* PIT */ && \
|
||||
!defined(MCU_MK21D5WS) /* PIT */ && \
|
||||
!defined(MCU_MK21F12) /* PIT */ && \
|
||||
!defined(MCU_MK21F12WS) /* PIT */ && \
|
||||
!defined(MCU_MK22D5) /* PIT */ && \
|
||||
!defined(MCU_MK22F12810) /* PIT */ && \
|
||||
!defined(MCU_MK22F12) /* PIT */ && \
|
||||
!defined(MCU_MK22F25612) /* PIT */ && \
|
||||
!defined(MCU_MK22F51212) /* PIT */ && \
|
||||
!defined(MCU_MK24F12) /* PIT */ && \
|
||||
!defined(MCU_MK30D10) /* PIT */ && \
|
||||
!defined(MCU_MK30D7) /* PIT */ && \
|
||||
!defined(MCU_MK30DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK40D10) /* PIT */ && \
|
||||
!defined(MCU_MK40D7) /* PIT */ && \
|
||||
!defined(MCU_MK40DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* PIT */ && \
|
||||
!defined(MCU_MK50D10) /* PIT */ && \
|
||||
!defined(MCU_MK50D7) /* PIT */ && \
|
||||
!defined(MCU_MK50DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK51D10) /* PIT */ && \
|
||||
!defined(MCU_MK51D7) /* PIT */ && \
|
||||
!defined(MCU_MK51DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK52D10) /* PIT */ && \
|
||||
!defined(MCU_MK52DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK53D10) /* PIT */ && \
|
||||
!defined(MCU_MK53DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK60D10) /* PIT */ && \
|
||||
!defined(MCU_MK60F12) /* PIT */ && \
|
||||
!defined(MCU_MK60F15) /* PIT */ && \
|
||||
!defined(MCU_MK60DZ10) /* PIT */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* PIT */ && \
|
||||
!defined(MCU_MK61F12) /* PIT */ && \
|
||||
!defined(MCU_MK61F15) /* PIT */ && \
|
||||
!defined(MCU_MK61F12WS) /* PIT */ && \
|
||||
!defined(MCU_MK61F15WS) /* PIT */ && \
|
||||
!defined(MCU_MK63F12) /* PIT */ && \
|
||||
!defined(MCU_MK63F12WS) /* PIT */ && \
|
||||
!defined(MCU_MK64F12) /* PIT */ && \
|
||||
!defined(MCU_MK65F18) /* PIT */ && \
|
||||
!defined(MCU_MK65F18WS) /* PIT */ && \
|
||||
!defined(MCU_MK66F18) /* PIT */ && \
|
||||
!defined(MCU_MK70F12) /* PIT */ && \
|
||||
!defined(MCU_MK70F15) /* PIT */ && \
|
||||
!defined(MCU_MK70F12WS) /* PIT */ && \
|
||||
!defined(MCU_MK70F15WS) /* PIT */ && \
|
||||
!defined(MCU_MKE02Z2) /* PIT */ && \
|
||||
!defined(MCU_MKE02Z4) /* PIT */ && \
|
||||
!defined(MCU_SKEAZN642) /* PIT */ && \
|
||||
!defined(MCU_MKE04Z1284) /* PIT */ && \
|
||||
!defined(MCU_MKE04Z4) /* PIT */ && \
|
||||
!defined(MCU_SKEAZN84) /* PIT */ && \
|
||||
!defined(MCU_MKE06Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL04Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL05Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL14Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL15Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL16Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL24Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL25Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL26Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL34Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL36Z4) /* PIT */ && \
|
||||
!defined(MCU_MKL46Z4) /* PIT */ && \
|
||||
!defined(MCU_MKV31F12810) /* PIT */ && \
|
||||
!defined(MCU_MKV31F25612) /* PIT */ && \
|
||||
!defined(MCU_MKV31F51212) /* PIT */ && \
|
||||
!defined(MCU_MKW01Z4) /* PIT */ && \
|
||||
!defined(MCU_MKW21D5) /* PIT */ && \
|
||||
!defined(MCU_MKW21D5WS) /* PIT */ && \
|
||||
!defined(MCU_MKW22D5) /* PIT */ && \
|
||||
!defined(MCU_MKW22D5WS) /* PIT */ && \
|
||||
!defined(MCU_MKW24D5) /* PIT */ && \
|
||||
!defined(MCU_MKW24D5WS) /* PIT */ && \
|
||||
!defined(MCU_PCK20L4) /* PIT */ && \
|
||||
!defined(MCU_SKEAZ1284) /* PIT */
|
||||
// Unsupported MCU is active
|
||||
#error PIT PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* PIT channel constants */
|
||||
#define PIT_PDD_CHANNEL_0 0U /**< 0 */
|
||||
#define PIT_PDD_CHANNEL_1 0x1U /**< 1 */
|
||||
#define PIT_PDD_CHANNEL_2 0x2U /**< 2 */
|
||||
#define PIT_PDD_CHANNEL_3 0x3U /**< 3 */
|
||||
|
||||
/* Module clock constants */
|
||||
#define PIT_PDD_CLOCK_ENABLED 0U /**< Enabled */
|
||||
#define PIT_PDD_CLOCK_DISABLED PIT_MCR_MDIS_MASK /**< Disabled */
|
||||
|
||||
/* Freeze constants */
|
||||
#define PIT_PDD_TIMERS_RUN 0U /**< Run */
|
||||
#define PIT_PDD_TIMERS_STOPPED PIT_MCR_FRZ_MASK /**< Stopped */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt mask.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_GetInterruptMask(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_GetInterruptMask(PeripheralBase, ChannelIdx) ( \
|
||||
(uint32)(PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) & PIT_TCTRL_TIE_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt flag bit.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: TFLG[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_GetInterruptFlag(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_GetInterruptFlag(PeripheralBase, ChannelIdx) ( \
|
||||
(uint32)(PIT_TFLG_REG(PeripheralBase,(ChannelIdx)) & PIT_TFLG_TIF_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the PIT interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_EnableInterrupt(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_EnableInterrupt(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) |= \
|
||||
PIT_TCTRL_TIE_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disables the PIT interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_DisableInterrupt(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_DisableInterrupt(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) &= \
|
||||
(uint32)(~(uint32)PIT_TCTRL_TIE_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clears PIT interrupt flag.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TFLG[ChannelIdx],
|
||||
* LDVAL[ChannelIdx] (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_ClearInterruptFlag(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ClearInterruptFlag(PeripheralBase, ChannelIdx) ( \
|
||||
(PIT_TFLG_REG(PeripheralBase,(ChannelIdx)) = \
|
||||
PIT_TFLG_TIF_MASK), \
|
||||
(void)PIT_LDVAL_REG(PeripheralBase,(ChannelIdx)) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ModuleClock
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables/disables PIT module clock.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Clock New value of the clock. Use constants from group "Module clock
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: PIT_MCR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_ModuleClock(<peripheral>_BASE_PTR, PIT_PDD_CLOCK_ENABLED);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ModuleClock(PeripheralBase, Clock) ( \
|
||||
PIT_MCR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(PIT_MCR_REG(PeripheralBase) & (uint32)(~(uint32)PIT_MCR_MDIS_MASK))) | ( \
|
||||
(uint32)(Clock))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ModuleFreeze
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Allows the timers to be stopped when the device enters debug mode.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Freeze New value of the freeze. Use constants from group "Freeze
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: PIT_MCR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_ModuleFreeze(<peripheral>_BASE_PTR, PIT_PDD_TIMERS_RUN);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ModuleFreeze(PeripheralBase, Freeze) ( \
|
||||
PIT_MCR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(PIT_MCR_REG(PeripheralBase) & (uint32)(~(uint32)PIT_MCR_FRZ_MASK))) | ( \
|
||||
(uint32)(Freeze))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteLoadReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the load register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @param Value New content of the load register. This parameter is a 32-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: LDVAL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_WriteLoadReg(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_WriteLoadReg(PeripheralBase, ChannelIdx, Value) ( \
|
||||
PIT_LDVAL_REG(PeripheralBase,(ChannelIdx)) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadLoadReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the load register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: LDVAL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_ReadLoadReg(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ReadLoadReg(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_LDVAL_REG(PeripheralBase,(ChannelIdx)) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimerValueReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the current timer value register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: CVAL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_ReadTimerValueReg(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ReadTimerValueReg(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_CVAL_REG(PeripheralBase,(ChannelIdx)) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableDevice
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the PIT channel device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @param State Requested state of PIT channel. This parameter is of "Global
|
||||
* enumeration used for specifying general enable/disable states (PDD_DISABLE
|
||||
* and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_EnableDevice(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0,
|
||||
* PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_EnableDevice(PeripheralBase, ChannelIdx, State) ( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx))) & ( \
|
||||
(uint32)(~(uint32)PIT_TCTRL_TEN_MASK)))) | ( \
|
||||
(uint32)(State))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetEnableDeviceStatus
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns current state of PIT channel device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_GetEnableDeviceStatus(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_GetEnableDeviceStatus(PeripheralBase, ChannelIdx) ( \
|
||||
(uint32)(PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) & PIT_TCTRL_TEN_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteModuleControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the module control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the module control register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: PIT_MCR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_WriteModuleControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_WriteModuleControlReg(PeripheralBase, Value) ( \
|
||||
PIT_MCR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadModuleControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the module control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: PIT_MCR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_ReadModuleControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ReadModuleControlReg(PeripheralBase) ( \
|
||||
PIT_MCR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTimerControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the timer control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @param Value New content of the timer control register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_WriteTimerControlReg(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0,
|
||||
* 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_WriteTimerControlReg(PeripheralBase, ChannelIdx, Value) ( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimerControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the timer control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: TCTRL[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_ReadTimerControlReg(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ReadTimerControlReg(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_TCTRL_REG(PeripheralBase,(ChannelIdx)) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTimerFlagReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the timer flag register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @param Value New content of the timer flag register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: TFLG[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* PIT_PDD_WriteTimerFlagReg(<peripheral>_BASE_PTR, PIT_PDD_CHANNEL_0, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_WriteTimerFlagReg(PeripheralBase, ChannelIdx, Value) ( \
|
||||
PIT_TFLG_REG(PeripheralBase,(ChannelIdx)) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimerFlagReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the timer flag register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ChannelIdx PIT channel index. Use constants from group "PIT channel
|
||||
* constants". This parameter is 32 bits wide.
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: TFLG[ChannelIdx].
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = PIT_PDD_ReadTimerFlagReg(<peripheral>_BASE_PTR,
|
||||
* PIT_PDD_CHANNEL_0);
|
||||
* @endcode
|
||||
*/
|
||||
#define PIT_PDD_ReadTimerFlagReg(PeripheralBase, ChannelIdx) ( \
|
||||
PIT_TFLG_REG(PeripheralBase,(ChannelIdx)) \
|
||||
)
|
||||
#endif /* #if defined(PIT_PDD_H_) */
|
||||
|
||||
/* PIT_PDD.h, eof. */
|
||||
2375
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/PORT_PDD.h
Normal file
2375
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/PORT_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
3576
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/RTC_PDD.h
Normal file
3576
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/RTC_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
4409
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SAI_PDD.h
Normal file
4409
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SAI_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
2413
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SDHC_PDD.h
Normal file
2413
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SDHC_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
6806
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SIM_PDD.h
Normal file
6806
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SIM_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
3857
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SPI_PDD.h
Normal file
3857
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/SPI_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,539 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type SysTick
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(SysTick_PDD_H_)
|
||||
#define SysTick_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error SysTick PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* SysTick */ && \
|
||||
!defined(MCU_MK10D5) /* SysTick */ && \
|
||||
!defined(MCU_MK10D7) /* SysTick */ && \
|
||||
!defined(MCU_MK10F12) /* SysTick */ && \
|
||||
!defined(MCU_MK10DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK11D5) /* SysTick */ && \
|
||||
!defined(MCU_MK11D5WS) /* SysTick */ && \
|
||||
!defined(MCU_MK12D5) /* SysTick */ && \
|
||||
!defined(MCU_MK20D10) /* SysTick */ && \
|
||||
!defined(MCU_MK20D5) /* SysTick */ && \
|
||||
!defined(MCU_MK20D7) /* SysTick */ && \
|
||||
!defined(MCU_MK20F12) /* SysTick */ && \
|
||||
!defined(MCU_MK20DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK21D5) /* SysTick */ && \
|
||||
!defined(MCU_MK21D5WS) /* SysTick */ && \
|
||||
!defined(MCU_MK21F12) /* SysTick */ && \
|
||||
!defined(MCU_MK21F12WS) /* SysTick */ && \
|
||||
!defined(MCU_MK22D5) /* SysTick */ && \
|
||||
!defined(MCU_MK22F12810) /* SysTick */ && \
|
||||
!defined(MCU_MK22F12) /* SysTick */ && \
|
||||
!defined(MCU_MK22F25612) /* SysTick */ && \
|
||||
!defined(MCU_MK22F51212) /* SysTick */ && \
|
||||
!defined(MCU_MK24F12) /* SysTick */ && \
|
||||
!defined(MCU_MK30D10) /* SysTick */ && \
|
||||
!defined(MCU_MK30D7) /* SysTick */ && \
|
||||
!defined(MCU_MK30DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK40D10) /* SysTick */ && \
|
||||
!defined(MCU_MK40D7) /* SysTick */ && \
|
||||
!defined(MCU_MK40DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* SysTick */ && \
|
||||
!defined(MCU_MK50D10) /* SysTick */ && \
|
||||
!defined(MCU_MK50D7) /* SysTick */ && \
|
||||
!defined(MCU_MK50DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK51D10) /* SysTick */ && \
|
||||
!defined(MCU_MK51D7) /* SysTick */ && \
|
||||
!defined(MCU_MK51DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK52D10) /* SysTick */ && \
|
||||
!defined(MCU_MK52DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK53D10) /* SysTick */ && \
|
||||
!defined(MCU_MK53DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK60D10) /* SysTick */ && \
|
||||
!defined(MCU_MK60F12) /* SysTick */ && \
|
||||
!defined(MCU_MK60F15) /* SysTick */ && \
|
||||
!defined(MCU_MK60DZ10) /* SysTick */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* SysTick */ && \
|
||||
!defined(MCU_MK61F12) /* SysTick */ && \
|
||||
!defined(MCU_MK61F15) /* SysTick */ && \
|
||||
!defined(MCU_MK61F12WS) /* SysTick */ && \
|
||||
!defined(MCU_MK61F15WS) /* SysTick */ && \
|
||||
!defined(MCU_MK63F12) /* SysTick */ && \
|
||||
!defined(MCU_MK63F12WS) /* SysTick */ && \
|
||||
!defined(MCU_MK64F12) /* SysTick */ && \
|
||||
!defined(MCU_MK65F18) /* SysTick */ && \
|
||||
!defined(MCU_MK65F18WS) /* SysTick */ && \
|
||||
!defined(MCU_MK66F18) /* SysTick */ && \
|
||||
!defined(MCU_MK70F12) /* SysTick */ && \
|
||||
!defined(MCU_MK70F15) /* SysTick */ && \
|
||||
!defined(MCU_MK70F12WS) /* SysTick */ && \
|
||||
!defined(MCU_MK70F15WS) /* SysTick */ && \
|
||||
!defined(MCU_MKE02Z2) /* SysTick */ && \
|
||||
!defined(MCU_MKE02Z4) /* SysTick */ && \
|
||||
!defined(MCU_SKEAZN642) /* SysTick */ && \
|
||||
!defined(MCU_MKE04Z1284) /* SysTick */ && \
|
||||
!defined(MCU_MKE04Z4) /* SysTick */ && \
|
||||
!defined(MCU_SKEAZN84) /* SysTick */ && \
|
||||
!defined(MCU_MKE06Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL02Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL03Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL04Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL05Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL14Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL15Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL16Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL24Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL25Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL26Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL34Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL36Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKL46Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKV10Z7) /* SysTick */ && \
|
||||
!defined(MCU_MKV31F12810) /* SysTick */ && \
|
||||
!defined(MCU_MKV31F25612) /* SysTick */ && \
|
||||
!defined(MCU_MKV31F51212) /* SysTick */ && \
|
||||
!defined(MCU_MKW01Z4) /* SysTick */ && \
|
||||
!defined(MCU_MKW21D5) /* SysTick */ && \
|
||||
!defined(MCU_MKW21D5WS) /* SysTick */ && \
|
||||
!defined(MCU_MKW22D5) /* SysTick */ && \
|
||||
!defined(MCU_MKW22D5WS) /* SysTick */ && \
|
||||
!defined(MCU_MKW24D5) /* SysTick */ && \
|
||||
!defined(MCU_MKW24D5WS) /* SysTick */ && \
|
||||
!defined(MCU_PCK20L4) /* SysTick */ && \
|
||||
!defined(MCU_SKEAZ1284) /* SysTick */
|
||||
// Unsupported MCU is active
|
||||
#error SysTick PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if ((defined(MCU_MKE02Z2)) || (defined(MCU_MKE02Z4)) || (defined(MCU_MKE04Z1284)) || (defined(MCU_MKE04Z4)) || (defined(MCU_MKE06Z4)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKW01Z4)) || (defined(MCU_SKEAZ1284)) || (defined(MCU_SKEAZN642)) || (defined(MCU_SKEAZN84)))
|
||||
/* Clock source constants. */
|
||||
#define SysTick_PDD_CORE_CLOCK 0x1U /**< 1 */
|
||||
#define SysTick_PDD_CORE_CLOCK_DIV16 0U /**< 1 */
|
||||
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
/* Clock source constants. */
|
||||
#define SysTick_PDD_CORE_CLOCK 0x1U /**< 1 */
|
||||
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptMask
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt mask.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = SysTick_PDD_GetInterruptMask(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_GetInterruptMask(PeripheralBase) ( \
|
||||
(uint32)(SysTick_CSR_REG(PeripheralBase) & SysTick_CSR_TICKINT_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns interrupt flag bit.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = SysTick_PDD_GetInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_GetInterruptFlag(PeripheralBase) ( \
|
||||
(uint32)(SysTick_CSR_REG(PeripheralBase) & SysTick_CSR_COUNTFLAG_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the SysTick interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_EnableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_EnableInterrupt(PeripheralBase) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) |= \
|
||||
SysTick_CSR_TICKINT_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disables the SysTick interrupt.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_DisableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_DisableInterrupt(PeripheralBase) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)SysTick_CSR_TICKINT_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clears SysTick interrupt flag.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_ClearInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_ClearInterruptFlag(PeripheralBase) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)SysTick_CSR_COUNTFLAG_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableDevice
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables the SysTick device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Requested state of SysTick device. This parameter is of "Global
|
||||
* enumeration used for specifying general enable/disable states
|
||||
* (PDD_DISABLE and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_EnableDevice(<peripheral>_BASE_PTR, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_EnableDevice(PeripheralBase, State) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
SysTick_CSR_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)SysTick_CSR_ENABLE_MASK)))) | ( \
|
||||
(uint32)(State))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetEnableDeviceStatus
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns current state of SysTick device.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* SysTick_PDD_GetEnableDeviceStatus(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_GetEnableDeviceStatus(PeripheralBase) ( \
|
||||
(uint32)(SysTick_CSR_REG(PeripheralBase) & SysTick_CSR_ENABLE_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetClkSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets clock source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param ClkSource New value of the clock source. Use constants from group
|
||||
* "Clock source constants.". This parameter is 1 bit wide.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_SetClkSource(<peripheral>_BASE_PTR, SysTick_PDD_CORE_CLOCK);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_SetClkSource(PeripheralBase, ClkSource) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
SysTick_CSR_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)SysTick_CSR_CLKSOURCE_MASK)))) | ( \
|
||||
(uint32)((uint32)(ClkSource) << SysTick_CSR_CLKSOURCE_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetClkSource
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if ((defined(MCU_MKE02Z2)) || (defined(MCU_MKE02Z4)) || (defined(MCU_MKE04Z1284)) || (defined(MCU_MKE04Z4)) || (defined(MCU_MKE06Z4)) || (defined(MCU_MKL02Z4)) || (defined(MCU_MKL03Z4)) || (defined(MCU_MKL04Z4)) || (defined(MCU_MKL05Z4)) || (defined(MCU_MKL14Z4)) || (defined(MCU_MKL15Z4)) || (defined(MCU_MKL16Z4)) || (defined(MCU_MKL24Z4)) || (defined(MCU_MKL25Z4)) || (defined(MCU_MKL26Z4)) || (defined(MCU_MKL34Z4)) || (defined(MCU_MKL36Z4)) || (defined(MCU_MKL46Z4)) || (defined(MCU_MKV10Z7)) || (defined(MCU_MKW01Z4)) || (defined(MCU_SKEAZ1284)) || (defined(MCU_SKEAZN642)) || (defined(MCU_SKEAZN84)))
|
||||
/**
|
||||
* @brief Gets clock source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Use constants from group "Clock source constants." for processing
|
||||
* return value. The value is cast to "uint8".
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = SysTick_PDD_GetClkSource(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_GetClkSource(PeripheralBase) ( \
|
||||
(uint8)(( \
|
||||
(uint32)(SysTick_CSR_REG(PeripheralBase) & SysTick_CSR_CLKSOURCE_MASK)) >> ( \
|
||||
SysTick_CSR_CLKSOURCE_SHIFT)) \
|
||||
)
|
||||
#else /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
/**
|
||||
* @brief Gets clock source.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Use constants from group "Clock source constants." for processing
|
||||
* return value. The value is cast to "uint8".
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = SysTick_PDD_GetClkSource(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_GetClkSource(PeripheralBase) ( \
|
||||
0x1U \
|
||||
)
|
||||
#endif /* (defined(MCU_MK10D10)) || (defined(MCU_MK10D5)) || (defined(MCU_MK10D7)) || (defined(MCU_MK10DZ10)) || (defined(MCU_MK10F12)) || (defined(MCU_MK11D5)) || (defined(MCU_MK11D5WS)) || (defined(MCU_MK12D5)) || (defined(MCU_MK20D10)) || (defined(MCU_MK20D5)) || (defined(MCU_MK20D7)) || (defined(MCU_MK20DZ10)) || (defined(MCU_MK20F12)) || (defined(MCU_MK21D5)) || (defined(MCU_MK21D5WS)) || (defined(MCU_MK21F12)) || (defined(MCU_MK21F12WS)) || (defined(MCU_MK22D5)) || (defined(MCU_MK22F12)) || (defined(MCU_MK22F12810)) || (defined(MCU_MK22F25612)) || (defined(MCU_MK22F51212)) || (defined(MCU_MK24F12)) || (defined(MCU_MK30D10)) || (defined(MCU_MK30D7)) || (defined(MCU_MK30DZ10)) || (defined(MCU_MK40D10)) || (defined(MCU_MK40D7)) || (defined(MCU_MK40DZ10)) || (defined(MCU_MK40X256VMD100)) || (defined(MCU_MK50D10)) || (defined(MCU_MK50D7)) || (defined(MCU_MK50DZ10)) || (defined(MCU_MK51D10)) || (defined(MCU_MK51D7)) || (defined(MCU_MK51DZ10)) || (defined(MCU_MK52D10)) || (defined(MCU_MK52DZ10)) || (defined(MCU_MK53D10)) || (defined(MCU_MK53DZ10)) || (defined(MCU_MK60D10)) || (defined(MCU_MK60DZ10)) || (defined(MCU_MK60F12)) || (defined(MCU_MK60F15)) || (defined(MCU_MK60N512VMD100)) || (defined(MCU_MK61F12)) || (defined(MCU_MK61F12WS)) || (defined(MCU_MK61F15)) || (defined(MCU_MK61F15WS)) || (defined(MCU_MK63F12)) || (defined(MCU_MK63F12WS)) || (defined(MCU_MK64F12)) || (defined(MCU_MK65F18)) || (defined(MCU_MK65F18WS)) || (defined(MCU_MK66F18)) || (defined(MCU_MK70F12)) || (defined(MCU_MK70F12WS)) || (defined(MCU_MK70F15)) || (defined(MCU_MK70F15WS)) || (defined(MCU_MKV31F12810)) || (defined(MCU_MKV31F25612)) || (defined(MCU_MKV31F51212)) || (defined(MCU_MKW21D5)) || (defined(MCU_MKW21D5WS)) || (defined(MCU_MKW22D5)) || (defined(MCU_MKW22D5WS)) || (defined(MCU_MKW24D5)) || (defined(MCU_MKW24D5WS)) || (defined(MCU_PCK20L4)) */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteControlStatusReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the control and status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the control and status register. This parameter
|
||||
* is a 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_WriteControlStatusReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_WriteControlStatusReg(PeripheralBase, Value) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadControlStatusReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the control and status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CSR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* SysTick_PDD_ReadControlStatusReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_ReadControlStatusReg(PeripheralBase) ( \
|
||||
SysTick_CSR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteReloadValueReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the reload register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the reload register. This parameter is a 32-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_RVR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_WriteReloadValueReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_WriteReloadValueReg(PeripheralBase, Value) ( \
|
||||
SysTick_RVR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadReloadValueReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the reload register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_RVR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = SysTick_PDD_ReadReloadValueReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_ReadReloadValueReg(PeripheralBase) ( \
|
||||
SysTick_RVR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteCurrentValueReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes value to the current value register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value New content of the current value register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: SYST_CVR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* SysTick_PDD_WriteCurrentValueReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_WriteCurrentValueReg(PeripheralBase, Value) ( \
|
||||
SysTick_CVR_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCurrentValueReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the current value register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CVR.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* SysTick_PDD_ReadCurrentValueReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_ReadCurrentValueReg(PeripheralBase) ( \
|
||||
SysTick_CVR_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadCalibrationReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the content of the calibration register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: SYST_CALIB.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = SysTick_PDD_ReadCalibrationReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define SysTick_PDD_ReadCalibrationReg(PeripheralBase) ( \
|
||||
SysTick_CALIB_REG(PeripheralBase) \
|
||||
)
|
||||
#endif /* #if defined(SysTick_PDD_H_) */
|
||||
|
||||
/* SysTick_PDD.h, eof. */
|
||||
5346
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/UART_PDD.h
Normal file
5346
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/UART_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,816 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type USBDCD
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(USBDCD_PDD_H_)
|
||||
#define USBDCD_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error USBDCD PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK20D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK20D5) /* USBDCD */ && \
|
||||
!defined(MCU_MK20D7) /* USBDCD */ && \
|
||||
!defined(MCU_MK20F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK20DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK21D5) /* USBDCD */ && \
|
||||
!defined(MCU_MK21D5WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK21F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK21F12WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK22D5) /* USBDCD */ && \
|
||||
!defined(MCU_MK22F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK24F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK40D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK40D7) /* USBDCD */ && \
|
||||
!defined(MCU_MK40DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* USBDCD */ && \
|
||||
!defined(MCU_MK50D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK50D7) /* USBDCD */ && \
|
||||
!defined(MCU_MK50DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK51D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK51D7) /* USBDCD */ && \
|
||||
!defined(MCU_MK51DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK52D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK52DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK53D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK53DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK60D10) /* USBDCD */ && \
|
||||
!defined(MCU_MK60F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK60F15) /* USBDCD */ && \
|
||||
!defined(MCU_MK60DZ10) /* USBDCD */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* USBDCD */ && \
|
||||
!defined(MCU_MK61F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK61F15) /* USBDCD */ && \
|
||||
!defined(MCU_MK61F12WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK61F15WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK63F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK63F12WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK64F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK65F18) /* USBDCD, USBHSDCD */ && \
|
||||
!defined(MCU_MK65F18WS) /* USBDCD, USBHSDCD */ && \
|
||||
!defined(MCU_MK66F18) /* USBDCD, USBHSDCD */ && \
|
||||
!defined(MCU_MK70F12) /* USBDCD */ && \
|
||||
!defined(MCU_MK70F15) /* USBDCD */ && \
|
||||
!defined(MCU_MK70F12WS) /* USBDCD */ && \
|
||||
!defined(MCU_MK70F15WS) /* USBDCD */ && \
|
||||
!defined(MCU_MKW22D5) /* USBDCD */ && \
|
||||
!defined(MCU_MKW22D5WS) /* USBDCD */ && \
|
||||
!defined(MCU_MKW24D5) /* USBDCD */ && \
|
||||
!defined(MCU_MKW24D5WS) /* USBDCD */ && \
|
||||
!defined(MCU_PCK20L4) /* USBDCD */
|
||||
// Unsupported MCU is active
|
||||
#error USBDCD PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Status flags constants (for ReadStatusReg macro). */
|
||||
#define USBDCD_PDD_ACTIVE_STATUS_INDICATOR USBDCD_STATUS_ACTIVE_MASK /**< Active status indicator - indicates whether the sequence is running */
|
||||
#define USBDCD_PDD_TIMEOUT_FLAG USBDCD_STATUS_TO_MASK /**< Timeout flag */
|
||||
#define USBDCD_PDD_ERROR_FLAG USBDCD_STATUS_ERR_MASK /**< Error flag */
|
||||
|
||||
/* Receiver status bits constants */
|
||||
#define USBDCD_PDD_DATA_PIN_NOT_DETECTED 0U /**< The module is either not enabled, or the module is enabled but the data pins have not yet been detected */
|
||||
#define USBDCD_PDD_DATA_PIN_CONTACT_COMPLETE 0x40000U /**< Data pin contact detection complete */
|
||||
#define USBDCD_PDD_CHARGER_PORT_COMPLETE 0x80000U /**< Charger port detection complete */
|
||||
#define USBDCD_PDD_CHARGER_TYPE_COMPLETE 0xC0000U /**< Charger type detection complete */
|
||||
|
||||
/* Receiver status bits constants */
|
||||
#define USBDCD_PDD_NO_RESULTS_REPORTED 0U /**< No results to report */
|
||||
#define USBDCD_PDD_ATTACHED_TO_HOST 0x10000U /**< Attached to a standard host */
|
||||
#define USBDCD_PDD_ATTACHED_TO_CHARGING_PORT 0x20000U /**< Attached to a charging port */
|
||||
#define USBDCD_PDD_ATTACHED_TO_DEDICATED_CHARGER 0x30000U /**< Attached to a dedicated charger. */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- PerformSoftwareReset
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Perform a software reset.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_PerformSoftwareReset(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_PerformSoftwareReset(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) |= \
|
||||
USBDCD_CONTROL_SR_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- StartChangeDetectionSequence
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Initiate the charger detection sequence.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_StartChangeDetectionSequence(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_StartChangeDetectionSequence(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) |= \
|
||||
USBDCD_CONTROL_START_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables interrupts to the system.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_EnableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_EnableInterrupt(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) |= \
|
||||
USBDCD_CONTROL_IE_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- DisableInterrupt
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Disable interrupts to the system.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_DisableInterrupt(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_DisableInterrupt(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) &= \
|
||||
(uint32)(~(uint32)USBDCD_CONTROL_IE_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Gets the status of the interrupt flag bit.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_GetInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_GetInterruptFlag(PeripheralBase) ( \
|
||||
(uint32)(USBDCD_CONTROL_REG(PeripheralBase) & USBDCD_CONTROL_IF_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ClearInterruptFlag
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Clears interrupt flag.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_ClearInterruptFlag(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ClearInterruptFlag(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) |= \
|
||||
USBDCD_CONTROL_IACK_MASK \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadControlReg(PeripheralBase) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the control register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CONTROL,
|
||||
* USBHSDCD_CONTROL (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_WriteControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_WriteControlReg(PeripheralBase, Value) ( \
|
||||
USBDCD_CONTROL_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetClockSpeedInKhz
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the numerical value of clock speed in kHz.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Clock speed in kHz, value[1..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CLOCK,
|
||||
* USBHSDCD_CLOCK (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetClockSpeedInKhz(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetClockSpeedInKhz(PeripheralBase, Value) ( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase)) & (( \
|
||||
(uint32)(~(uint32)USBDCD_CLOCK_CLOCK_SPEED_MASK)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_CLOCK_CLOCK_UNIT_MASK))))) | ( \
|
||||
(uint32)((uint32)(Value) << USBDCD_CLOCK_CLOCK_SPEED_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetClockSpeedInMhz
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the numerical value of clock speed in MHz.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Clock speed in MHz, value[1..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CLOCK,
|
||||
* USBHSDCD_CLOCK (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetClockSpeedInMhz(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetClockSpeedInMhz(PeripheralBase, Value) ( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_CLOCK_CLOCK_SPEED_MASK)))) | (( \
|
||||
(uint32)((uint32)(Value) << USBDCD_CLOCK_CLOCK_SPEED_SHIFT)) | ( \
|
||||
USBDCD_CLOCK_CLOCK_UNIT_MASK))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadClockReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads clock register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CLOCK,
|
||||
* USBHSDCD_CLOCK (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadClockReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadClockReg(PeripheralBase) ( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteClockReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into clock register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the clock register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_CLOCK,
|
||||
* USBHSDCD_CLOCK (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_WriteClockReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_WriteClockReg(PeripheralBase, Value) ( \
|
||||
USBDCD_CLOCK_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetStatusFlags
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns the value of the status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_STATUS,
|
||||
* USBHSDCD_STATUS (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_GetStatusFlags(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_GetStatusFlags(PeripheralBase) ( \
|
||||
USBDCD_STATUS_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetChargerDetectionSequenceStatus
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns charger detection sequence status.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of "Receiver status bits constants" type. The value
|
||||
* is cast to "uint32".
|
||||
* @remarks The macro accesses the following registers: USBDCD_STATUS,
|
||||
* USBHSDCD_STATUS (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* USBDCD_PDD_GetChargerDetectionSequenceStatus(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_GetChargerDetectionSequenceStatus(PeripheralBase) ( \
|
||||
(uint32)(USBDCD_STATUS_REG(PeripheralBase) & USBDCD_STATUS_SEQ_STAT_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetChargerDetectionSequenceResults
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns charger detection sequence status.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of "Receiver status bits constants" type. The value
|
||||
* is cast to "uint32".
|
||||
* @remarks The macro accesses the following registers: USBDCD_STATUS,
|
||||
* USBHSDCD_STATUS (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result =
|
||||
* USBDCD_PDD_GetChargerDetectionSequenceResults(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_GetChargerDetectionSequenceResults(PeripheralBase) ( \
|
||||
(uint32)(USBDCD_STATUS_REG(PeripheralBase) & USBDCD_STATUS_SEQ_RES_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadStatusReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads status register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Use constants from group "Status flags constants (for ReadStatusReg
|
||||
* macro)." for processing return value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_STATUS,
|
||||
* USBHSDCD_STATUS (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadStatusReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadStatusReg(PeripheralBase) ( \
|
||||
USBDCD_STATUS_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetSequenceInitiationTime
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the system latency (in ms).
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Time System latency (in ms) value[0..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER0,
|
||||
* USBHSDCD_TIMER0 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetSequenceInitiationTime(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetSequenceInitiationTime(PeripheralBase, Time) ( \
|
||||
USBDCD_TIMER0_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_TIMER0_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_TIMER0_TSEQ_INIT_MASK)))) | ( \
|
||||
(uint32)((uint32)(Time) << USBDCD_TIMER0_TSEQ_INIT_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetUnitConnectionTimerElapse
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns unit connection timer elapse value (in ms).
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 12-bit value. The value is cast to "uint16".
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER0,
|
||||
* USBHSDCD_TIMER0 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint16 result =
|
||||
* USBDCD_PDD_GetUnitConnectionTimerElapse(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_GetUnitConnectionTimerElapse(PeripheralBase) ( \
|
||||
(uint16)(USBDCD_TIMER0_REG(PeripheralBase) & USBDCD_TIMER0_TUNITCON_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimer0Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads timer 0 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER0,
|
||||
* USBHSDCD_TIMER0 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadTimer0Reg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadTimer0Reg(PeripheralBase) ( \
|
||||
USBDCD_TIMER0_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTimer0Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into timer 0 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the timer 0 register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER0,
|
||||
* USBHSDCD_TIMER0 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_WriteTimer0Reg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_WriteTimer0Reg(PeripheralBase, Value) ( \
|
||||
USBDCD_TIMER0_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTimePeriodToDebounceDpSignal
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the time period (ms) to debounce the D+ signal during the data
|
||||
* pin contact detection phase.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Period Time period (in ms) value[1..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER1,
|
||||
* USBHSDCD_TIMER1 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetTimePeriodToDebounceDpSignal(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetTimePeriodToDebounceDpSignal(PeripheralBase, Period) ( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_TIMER1_TDCD_DBNC_MASK)))) | ( \
|
||||
(uint32)((uint32)(Period) << USBDCD_TIMER1_TDCD_DBNC_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTimePeriodComparator
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the time period (ms) comparator enabled.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Period Time period (in ms) value[1..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER1,
|
||||
* USBHSDCD_TIMER1 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetTimePeriodComparator(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetTimePeriodComparator(PeripheralBase, Period) ( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_TIMER1_TVDPSRC_ON_MASK)))) | ( \
|
||||
(uint32)(Period))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimer1Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads timer 1 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER1,
|
||||
* USBHSDCD_TIMER1 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadTimer1Reg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadTimer1Reg(PeripheralBase) ( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTimer1Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into timer 1 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the timer 1 register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER1,
|
||||
* USBHSDCD_TIMER1 (depending on the peripheral).
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_WriteTimer1Reg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_WriteTimer1Reg(PeripheralBase, Value) ( \
|
||||
USBDCD_TIMER1_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTimePeriodBeforeEnablingDpPullup
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the time period (ms) before enabling D+ pullup.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Period Time period (in ms) value[1..1023]. This parameter is a 10-bit
|
||||
* value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER2.
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetTimePeriodBeforeEnablingDpPullup(<peripheral>_BASE_PTR,
|
||||
* 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetTimePeriodBeforeEnablingDpPullup(PeripheralBase, Period) ( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_TIMER2_TVDPSRC_CON_MASK)))) | ( \
|
||||
(uint32)((uint32)(Period) << USBDCD_TIMER2_TVDPSRC_CON_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTimeBeforeCheckDmLine
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Sets the time period (ms) before check D- line.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Time (in ms) value[1..15]. This parameter is a 4-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER2.
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_SetTimeBeforeCheckDmLine(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_SetTimeBeforeCheckDmLine(PeripheralBase, Value) ( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase) = \
|
||||
(uint32)(( \
|
||||
(uint32)(( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase)) & ( \
|
||||
(uint32)(~(uint32)USBDCD_TIMER2_CHECK_DM_MASK)))) | ( \
|
||||
(uint32)(Value))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTimer2Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads timer 2 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 32-bit value.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER2.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint32 result = USBDCD_PDD_ReadTimer2Reg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_ReadTimer2Reg(PeripheralBase) ( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTimer2Reg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes data specified by the Value parameter into timer 2 register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the timer 2 register. This parameter is a
|
||||
* 32-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: USBDCD_TIMER2.
|
||||
* @par Example:
|
||||
* @code
|
||||
* USBDCD_PDD_WriteTimer2Reg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define USBDCD_PDD_WriteTimer2Reg(PeripheralBase, Value) ( \
|
||||
USBDCD_TIMER2_REG(PeripheralBase) = \
|
||||
(uint32)(Value) \
|
||||
)
|
||||
#endif /* #if defined(USBDCD_PDD_H_) */
|
||||
|
||||
/* USBDCD_PDD.h, eof. */
|
||||
4849
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/USB_PDD.h
Normal file
4849
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/USB_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,413 @@
|
||||
/*
|
||||
PDD layer implementation for peripheral type VREF
|
||||
(C) 2013 Freescale, Inc. All rights reserved.
|
||||
|
||||
This file is static and it is generated from API-Factory
|
||||
*/
|
||||
|
||||
#if !defined(VREF_PDD_H_)
|
||||
#define VREF_PDD_H_
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Test if supported MCU is active
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
#if !defined(MCU_ACTIVE)
|
||||
// No MCU is active
|
||||
#error VREF PDD library: No derivative is active. Place proper #include with PDD memory map before including PDD library.
|
||||
#elif \
|
||||
!defined(MCU_MK10D10) /* VREF */ && \
|
||||
!defined(MCU_MK10D5) /* VREF */ && \
|
||||
!defined(MCU_MK10D7) /* VREF */ && \
|
||||
!defined(MCU_MK10F12) /* VREF */ && \
|
||||
!defined(MCU_MK10DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK11D5) /* VREF */ && \
|
||||
!defined(MCU_MK11D5WS) /* VREF */ && \
|
||||
!defined(MCU_MK12D5) /* VREF */ && \
|
||||
!defined(MCU_MK20D10) /* VREF */ && \
|
||||
!defined(MCU_MK20D5) /* VREF */ && \
|
||||
!defined(MCU_MK20D7) /* VREF */ && \
|
||||
!defined(MCU_MK20F12) /* VREF */ && \
|
||||
!defined(MCU_MK20DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK21D5) /* VREF */ && \
|
||||
!defined(MCU_MK21D5WS) /* VREF */ && \
|
||||
!defined(MCU_MK21F12) /* VREF */ && \
|
||||
!defined(MCU_MK21F12WS) /* VREF */ && \
|
||||
!defined(MCU_MK22D5) /* VREF */ && \
|
||||
!defined(MCU_MK22F12810) /* VREF */ && \
|
||||
!defined(MCU_MK22F12) /* VREF */ && \
|
||||
!defined(MCU_MK22F25612) /* VREF */ && \
|
||||
!defined(MCU_MK22F51212) /* VREF */ && \
|
||||
!defined(MCU_MK24F12) /* VREF */ && \
|
||||
!defined(MCU_MK30D10) /* VREF */ && \
|
||||
!defined(MCU_MK30D7) /* VREF */ && \
|
||||
!defined(MCU_MK30DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK40D10) /* VREF */ && \
|
||||
!defined(MCU_MK40D7) /* VREF */ && \
|
||||
!defined(MCU_MK40DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK40X256VMD100) /* VREF */ && \
|
||||
!defined(MCU_MK50D10) /* VREF */ && \
|
||||
!defined(MCU_MK50D7) /* VREF */ && \
|
||||
!defined(MCU_MK50DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK51D10) /* VREF */ && \
|
||||
!defined(MCU_MK51D7) /* VREF */ && \
|
||||
!defined(MCU_MK51DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK52D10) /* VREF */ && \
|
||||
!defined(MCU_MK52DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK53D10) /* VREF */ && \
|
||||
!defined(MCU_MK53DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK60D10) /* VREF */ && \
|
||||
!defined(MCU_MK60F12) /* VREF */ && \
|
||||
!defined(MCU_MK60F15) /* VREF */ && \
|
||||
!defined(MCU_MK60DZ10) /* VREF */ && \
|
||||
!defined(MCU_MK60N512VMD100) /* VREF */ && \
|
||||
!defined(MCU_MK61F12) /* VREF */ && \
|
||||
!defined(MCU_MK61F15) /* VREF */ && \
|
||||
!defined(MCU_MK61F12WS) /* VREF */ && \
|
||||
!defined(MCU_MK61F15WS) /* VREF */ && \
|
||||
!defined(MCU_MK63F12) /* VREF */ && \
|
||||
!defined(MCU_MK63F12WS) /* VREF */ && \
|
||||
!defined(MCU_MK64F12) /* VREF */ && \
|
||||
!defined(MCU_MK65F18) /* VREF */ && \
|
||||
!defined(MCU_MK65F18WS) /* VREF */ && \
|
||||
!defined(MCU_MK66F18) /* VREF */ && \
|
||||
!defined(MCU_MK70F12) /* VREF */ && \
|
||||
!defined(MCU_MK70F15) /* VREF */ && \
|
||||
!defined(MCU_MK70F12WS) /* VREF */ && \
|
||||
!defined(MCU_MK70F15WS) /* VREF */ && \
|
||||
!defined(MCU_MKL03Z4) /* VREF */ && \
|
||||
!defined(MCU_MKV31F12810) /* VREF */ && \
|
||||
!defined(MCU_MKV31F25612) /* VREF */ && \
|
||||
!defined(MCU_MKV31F51212) /* VREF */ && \
|
||||
!defined(MCU_PCK20L4) /* VREF */
|
||||
// Unsupported MCU is active
|
||||
#error VREF PDD library: Unsupported derivative is active.
|
||||
#endif
|
||||
|
||||
#include "PDD_Types.h"
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- Method symbol definitions
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/* Position of a parity bit */
|
||||
#define VREF_PDD_DISABLED_OR_NOT_STABLE 0U /**< The module is disabled or not stable. */
|
||||
#define VREF_PDD_STABLE 0x4U /**< The module is stable. */
|
||||
|
||||
/* Type of the buffer mode. */
|
||||
#define VREF_PDD_BANDGAP_ON_ONLY 0U /**< Bandgap on only, for stabilization and startup. */
|
||||
#define VREF_PDD_HIGH_POWER_BUFFER 0x1U /**< High power buffer mode enabled. */
|
||||
#define VREF_PDD_LOW_POWER_BUFFER 0x2U /**< Low power buffer mode enabled. */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableChopOscillator
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables chop oscillator.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Enables or disables chop oscillator. This parameter is of
|
||||
* "Global enumeration used for specifying general enable/disable states
|
||||
* (PDD_DISABLE and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_TRM.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_EnableChopOscillator(<peripheral>_BASE_PTR, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_EnableChopOscillator(PeripheralBase, State) ( \
|
||||
VREF_TRM_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_TRM_REG(PeripheralBase) & (uint8)(~(uint8)VREF_TRM_CHOPEN_MASK))) | ( \
|
||||
(uint8)((uint8)(State) << VREF_TRM_CHOPEN_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SetTrimValue
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Set trim value for voltage reference correction.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Trim value. This parameter is a 6-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_TRM.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_SetTrimValue(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_SetTrimValue(PeripheralBase, Value) ( \
|
||||
VREF_TRM_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_TRM_REG(PeripheralBase) & (uint8)(~(uint8)VREF_TRM_TRIM_MASK))) | ( \
|
||||
(uint8)(Value))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetTrimValue
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns trim value for voltage reference correction.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 6-bit value. The value is cast to "uint8".
|
||||
* @remarks The macro accesses the following registers: VREF_TRM.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = VREF_PDD_GetTrimValue(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_GetTrimValue(PeripheralBase) ( \
|
||||
(uint8)(VREF_TRM_REG(PeripheralBase) & VREF_TRM_TRIM_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadTrimReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads trim register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: VREF_TRM.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = VREF_PDD_ReadTrimReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_ReadTrimReg(PeripheralBase) ( \
|
||||
VREF_TRM_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteTrimReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes new value specified by the Value parameter into trim register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the trim register. This parameter is a
|
||||
* 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_TRM.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_WriteTrimReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_WriteTrimReg(PeripheralBase, Value) ( \
|
||||
VREF_TRM_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableInternalVoltageReference
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables internal voltage reference.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Enables or disables internal voltage reference. This parameter
|
||||
* is of "Global enumeration used for specifying general enable/disable
|
||||
* states (PDD_DISABLE and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_EnableInternalVoltageReference(<peripheral>_BASE_PTR,
|
||||
* PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_EnableInternalVoltageReference(PeripheralBase, State) ( \
|
||||
VREF_SC_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_SC_REG(PeripheralBase) & (uint8)(~(uint8)VREF_SC_VREFEN_MASK))) | ( \
|
||||
(uint8)((uint8)(State) << VREF_SC_VREFEN_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableRegulator
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables regulator.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Enables or disables regulator. This parameter is of "Global
|
||||
* enumeration used for specifying general enable/disable states (PDD_DISABLE
|
||||
* and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_EnableRegulator(<peripheral>_BASE_PTR, PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_EnableRegulator(PeripheralBase, State) ( \
|
||||
VREF_SC_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_SC_REG(PeripheralBase) & (uint8)(~(uint8)VREF_SC_REGEN_MASK))) | ( \
|
||||
(uint8)((uint8)(State) << VREF_SC_REGEN_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- EnableSecondOrderCurvatureCompensation
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Enables second order curvature compensation.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param State Enables or disables second order curvature compensation. This
|
||||
* parameter is of "Global enumeration used for specifying general
|
||||
* enable/disable states (PDD_DISABLE and PDD_ENABLE defined in PDD_Types.h)" type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_EnableSecondOrderCurvatureCompensation(<peripheral>_BASE_PTR,
|
||||
* PDD_DISABLE);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_EnableSecondOrderCurvatureCompensation(PeripheralBase, State) ( \
|
||||
VREF_SC_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_SC_REG(PeripheralBase) & (uint8)(~(uint8)VREF_SC_ICOMPEN_MASK))) | ( \
|
||||
(uint8)((uint8)(State) << VREF_SC_ICOMPEN_SHIFT))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- GetInternalVoltageReferenceState
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Returns state of the internal voltage reference.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a value of "Position of a parity bit" type. The value is cast
|
||||
* to "uint8".
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result =
|
||||
* VREF_PDD_GetInternalVoltageReferenceState(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_GetInternalVoltageReferenceState(PeripheralBase) ( \
|
||||
(uint8)(VREF_SC_REG(PeripheralBase) & VREF_SC_VREFST_MASK) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- SelectBufferMode
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Selects buffer mode.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Mode Type of the match operation. This parameter is of "Type of the
|
||||
* buffer mode." type.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_SelectBufferMode(<peripheral>_BASE_PTR,
|
||||
* VREF_PDD_BANDGAP_ON_ONLY);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_SelectBufferMode(PeripheralBase, Mode) ( \
|
||||
VREF_SC_REG(PeripheralBase) = \
|
||||
(uint8)(( \
|
||||
(uint8)(VREF_SC_REG(PeripheralBase) & (uint8)(~(uint8)VREF_SC_MODE_LV_MASK))) | ( \
|
||||
(uint8)(Mode))) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- ReadStatusControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Reads status and control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @return Returns a 8-bit value.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* uint8 result = VREF_PDD_ReadStatusControlReg(<peripheral>_BASE_PTR);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_ReadStatusControlReg(PeripheralBase) ( \
|
||||
VREF_SC_REG(PeripheralBase) \
|
||||
)
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
-- WriteStatusControlReg
|
||||
---------------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Writes new value specified by the Value parameter into status and
|
||||
* control register.
|
||||
* @param PeripheralBase Pointer to a peripheral registers structure (peripheral
|
||||
* base address). You can use the constant defined in the registers
|
||||
* definition header file (<peripheral>_BASE_PTR) or the constant defined in
|
||||
* the peripheral initialization component header file
|
||||
* (<component_name>_DEVICE).
|
||||
* @param Value Value to be written to the status and control register. This
|
||||
* parameter is a 8-bit value.
|
||||
* @return Returns a value of void type.
|
||||
* @remarks The macro accesses the following registers: VREF_SC.
|
||||
* @par Example:
|
||||
* @code
|
||||
* VREF_PDD_WriteStatusControlReg(<peripheral>_BASE_PTR, 1);
|
||||
* @endcode
|
||||
*/
|
||||
#define VREF_PDD_WriteStatusControlReg(PeripheralBase, Value) ( \
|
||||
VREF_SC_REG(PeripheralBase) = \
|
||||
(uint8)(Value) \
|
||||
)
|
||||
#endif /* #if defined(VREF_PDD_H_) */
|
||||
|
||||
/* VREF_PDD.h, eof. */
|
||||
1526
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/WDOG_PDD.h
Normal file
1526
Clean_TMC2209/lib/tmc/hal/Landungsbruecke/freescale/PDD/WDOG_PDD.h
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user